TLK3118 Datasheet, PDF (2/57 Pages) Texas Instruments – Redundant XAUI Transceiver

TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
Line Card
4
4
TLK3118
4
MAC/
Packet
Processor
4
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TCLK
TD(31:0)
TC(3:0)
4 _{CWDM or}
4
Parallel
Optics
TLK3118
RC(3:0)
RCLK
RD(31:0)
4
CWDM or
4
Parallel
Optics
Figure 1. System Block Diagram – PCS
Figure 2 shows an example system block diagram for TLK3118 used to provide the system backplane
interconnect.
Line Card
4
4
4
4
RCLK
RD[31:0]
RDP/N[3:0]0
RDP/N[3:0]1
RC(3:0)
TLK3118
XAUI
TCLK
TD(31:0)
TDP/N[3:0]0
TDP/N[3:0]1
TC(3:0)
MAC/
Packet
Processor
Framer/
PCS
PHY/
Optics
System
Backplane
4
4
4
4
RCLK
RD[31:0]
RDP/N[3:0]0
RDP/N[3:0]1
RC(3:0)
TLK3118
XAUI
TCLK
TD(31:0)
TDP/N[3:0]0
TDP/N[3:0]1
TC(3:0)
Switch Fabric
Figure 2. System Block Diagram – XAUI Backplane
The TLK3118 supports the IEEE 802.3 defined Management Data Input/Output (MDIO) Interface to allow ease in
configuration and status monitoring of the link. The bi-directional data pin (MDIO) should be externally pulled up
to 2.5 V.
The TLK3118 supports the IEEE 1149.1 defined JTAG test port for ease in board manufacturing test. It also
supports a comprehensive series of built-in tests for self-test purposes including PRBS generation and
verification, CRPAT, CJPAT, Mixed/High/Low Frequency testing.
2