TLK3118 Datasheet, PDF (23/57 Pages) Texas Instruments – Redundant XAUI Transceiver

www.ti.com
DVAD
43 2 1
A Side = 0
B Side = 1
TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
DVAD(0)
PHY=1
DTE=0
01000 00100
Physical Address Device Address
High Level illustration to Map DVAD Settings into MDIO Frame Structure
Illustrating Physical address of 8 and DTE access.
Figure 22. Device Address
Timing for an address transaction is shown in Figure 23. The timing required to write to the internal registers is
shown in Figure 24. The timing required to read from the internal registers is shown in Figure 25. The timing
required to read from the internal registers and then increment the active address for the next transaction is
shown in Figure 26.
MDC
MDIO
32 “1”s
0
0
0
0
A4
A0 DA4 DA0
1
0
A15 A0
1
Preamble
Start
PHY Address
Reg
Address
Idle
Dev Address
Address Code
Turn Around
Figure 23. Management Interface Extended Space Address Timing
MDC
MDIO
32 “1”s
0
0
0
1
A4
A0 DA4 DA0
1
0
D15 D0
1
Preamble
Start
Write Code
PHY Address
Data
Idle
Dev Address
Turn Around
Figure 24. Management Interface Extended Space Write Timing
23