TLK3118 Datasheet, PDF (30/57 Pages) Texas Instruments – Redundant XAUI Transceiver

TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
Table 34. LANE_0_CODE_ERROR_COUNT⁽¹⁾
www.ti.com
Address:0x8010
Default:0xFFFD
Bit(s)
Name
Description
4/5.32784.15: Lane 0 code error counter
0
Output 16-bit counter for invalid code group found in lane 0. Invalid code
group is detected when the 8B10B decoder cannot decode the received
codeword.
Access
RO/COR
(1) Counter will increment by 1 when codeword error is found on the corresponding lane and when all the lanes are aligned (align_status
should be high). Counter will hold on to its value when align_status goes low or when the counter reaches its maximum value. It will be
cleared when it is read.
Table 35. LANE_1_CODE_ERROR_COUNT⁽¹⁾
Address:0x8011
Default:0xFFFD
Bit(s)
Name
Description
4/5.32785.15: Lane 1 code error counter
0
Output 16-bit counter for invalid code group found in lane 1. Invalid code
group is detected when the 8B10B decoder cannot decode the received
codeword.
Access
RO/COR
(1) Counter will increment by 1 when codeword error is found on the corresponding lane and when all the lanes are aligned (align_status
should be high). Counter will hold on to its value when align_status goes low or when the counter reaches its maximum value. It will be
cleared when it is read.
Table 36. LANE_2_CODE_ERROR_COUNT⁽¹⁾
Address:0x8012
Default:0xFFFD
Bit(s)
Name
Description
4/5.32786.15: Lane 2 code error counter
0
Output 16-bit counter for invalid code group found in lane 2. Invalid code
group is detected when the 8B10B decoder cannot decode the received
codeword.
Access
RO/COR
(1) Counter will increment by 1 when codeword error is found on the corresponding lane and when all the lanes are aligned (align_status
should be high). Counter will hold on to its value when align_status goes low or when the counter reaches its maximum value. It will be
cleared when it is read.
Table 37. LANE_3_CODE_ERROR_COUNT⁽¹⁾
Address:0x8013
Default:0xFFFD
Bit(s)
Name
Description
4/5.32787.15: Lane 3 code error counter
0
Output 16-bit counter for invalid code group found in lane 3. Invalid code
group is detected when the 8B10B decoder cannot decode the received
codeword.
Access
RO/COR
(1) Counter will increment by 1 when codeword error is found on the corresponding lane and when all the lanes are aligned (align_status
should be high). Counter will hold on to its value when align_status goes low or when the counter reaches its maximum value. It will be
cleared when it is read.
Table 38. RX_CHANNEL_SYNC_STATE
Address:0x8014
Bit(s)
Name
Description
4/5.32788.11: Channel synchronization
9
FSM state for lane 0
Current state of sync state machine in lane 0
4/5.32788.8:6 Channel synchronization
FSM state for lane 1
Current state of sync state machine in lane 1
4/5.32788.5:3 Channel synchronization
FSM state for lane 2
Current state of sync state machine in lane 2
4/5.32788.2:0 Channel synchronization
FSM state for lane 3
Current state of sync state machine in lane 3
Default:0x0000
Access
RO
30