LSM6DSM Datasheet, PDF (54/113 Pages) STMicroelectronics – always-on 3D accelerometer and 3D gyroscope

Register description
LSM6DSM
RR_[1:0]
Table 24. SENSOR_SYNC_RES_RATIO register description
Resolution ratio of error code for sensor synchronization:
00: SensorSync, Res_Ratio = 2-11
01: SensorSync, Res_Ratio = 2-12
10: SensorSync, Res_Ratio = 2-13
11: SensorSync, Res_Ratio = 2-14
10.4
10.5
FIFO_CTRL1 (06h)
FIFO control register (r/w).
FTH_7
FTH_6
Table 25. FIFO_CTRL1 register
FTH_5 FTH_4 FTH_3 FTH_2
FTH_1
FTH_0
Table 26. FIFO_CTRL1 register description
FIFO threshold level setting⁽¹⁾. Default value: 0000 0000.
FTH_[7:0] ^{Watermark flag rises when the number of bytes written to FIFO after the next write is}
greater than or equal to the threshold level.
Minimum resolution for the FIFO is 1 LSB = 2 bytes (1 word) in FIFO
1. For a complete watermark threshold configuration, consider FTH_[10:8] in FIFO_CTRL2 (07h).
FIFO_CTRL2 (07h)
FIFO control register (r/w).
Table 27. FIFO_CTRL2 register
TIMER_PEDO TIMER_PEDO
_FIFO_EN _FIFO_DRDY
0⁽¹⁾
0⁽¹⁾
FIFO_
TEMP_EN
FTH10
FTH_9
FTH_8
1. This bit must be set to ‘0’ for the correct operation of the device.
TIMER_PEDO
_FIFO_EN
TIMER_PEDO
_FIFO_DRDY
Table 28. FIFO_CTRL2 register description
Enable pedometer step counter and timestamp as 4^th FIFO data set. Default: 0
(0: disable step counter and timestamp data as 4^th FIFO data set;
1: enable step counter and timestamp data as 4^th FIFO data set)
FIFO write mode⁽¹⁾. Default: 0
(0: enable write in FIFO based on XL/Gyro data-ready;
1: enable write in FIFO at every step detected by step counter.)
FIFO_TEMP_EN
FTH_[10:8]
Enable the temperature data storage in FIFO. Default: 0.
(0: temperature not included in FIFO; 1: temperature included in FIFO)
FIFO threshold level setting⁽²⁾. Default value: 0000
Watermark flag rises when the number of bytes written to FIFO after the next
write is greater than or equal to the threshold level.
Minimum resolution for the FIFO is 1LSB = 2 bytes (1 word) in FIFO
1. This bit is effective if the DATA_VALID_SEL_FIFO bit of the MASTER_CONFIG (1Ah) register is set to 0.
2. For a complete watermark threshold configuration, consider FTH_[7:0] in FIFO_CTRL1 (06h)
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