K4R881869M Datasheet, PDF (63/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R881869M
Preliminary
Direct RDRAM^™
Table Of Contents
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Key Timing Parameters/Part Numbers . . . . . . . . . . . 1
Pinouts and Definitions . . . . . . . . . . . . . . . . . . . . . . . 2
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Packet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6,7
Field Encoding Summary . . . . . . . . . . . . . . . . . . . . .8,9
DQ Packet Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 10
COLM Packet to D Packet Mapping . . . . . . . . . .10,11
ROW-to-ROW Packet Interaction . . . . . . . . . . . 12, 13
ROW-to-COL Packet Interaction . . . . . . . . . . . . . . . 13
COL-to-COL Packet Interaction . . . . . . . . . . . . . . . . 14
COL-to-ROW Packet Interaction . . . . . . . . . . . . . . . 15
ROW-to-ROW Examples . . . . . . . . . . . . . . . . . . .16,17
Row and Column Cycle Description . . . . . . . . . . . . 17
Precharge Mechanisms . . . . . . . . . . . . . . . . . . . .18,19
Read Transaction - Example . . . . . . . . . . . . . . . . . . 20
Write Transaction - Example . . . . . . . . . . . . . . . . . . 21
Write/Retire - Examples . . . . . . . . . . . . . . . . . . . 22, 23
Interleaved Write - Example. . . . . . . . . . . . . . . . . . . 24
Interleaved Read - Example . . . . . . . . . . . . . . . . . . 25
Interleaved RRWW . . . . . . . . . . . . . . . . . . . . . . . . . 25
Control Register Transactions . . . . . . . . . . . . . . . . . 26
Control Register Packets . . . . . . . . . . . . . . . . . . . . . 27
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28-29
Control Register Summary. . . . . . . . . . . . . . . . . 30-37
Power State Management . . . . . . . . . . . . . . . . . 38-41
Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Current and Temperature Control . . . . . . . . . . . . . . 43
Electrical Conditions . . . . . . . . . . . . . . . . . . . . . . . . 44
Timing Conditions . . . . . . . . . . . . . . . . . . . . . . . .44-45
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . 46
Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . 46
RSL Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
RSL - Receive Timing . . . . . . . . . . . . . . . . . . . . . . . 48
RSL - Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . 49
CMOS - Receive Timing . . . . . . . . . . . . . . . . . . .50-51
CMOS - Transmit Timing . . . . . . . . . . . . . . . . . . .52-53
RSL - Domain Crossing Window . . . . . . . . . . . . . . . 53
Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . 54
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . 55
I_DD - Supply Current Profile . . . . . . . . . . . . . . . . . . . 55
Capacitance and Inductance . . . . . . . . . . . . . . . .56-57
Center-Bonded µBGA Package. . . . . . . . . . . . . . . . 58
Glossary of Terms . . . . . . . . . . . . . . . . . . . . . . . .59-60
© Copyright January 2000 Samsung Electronics.
All rights reserved.
Direct Rambus and Direct RDRAM are trademarks of
Rambus Inc. Rambus, RDRAM, and the Rambus Logo are
registered trademarks of Rambus Inc.
This document contains advanced information that is subject
to change by Samsung without notice.
Document Version 0.9
Samsung Electronics Co., Ltd.
San #24 Nongseo-Ri, Kiheung-Eup Yongin-City
Kyunggi-Do, KOREA
Telephone: [phone]
Fax: [phone]
http://www.samsungsemi.com
Page 61
Rev. 0.9 Jan. 2000