K4R881869M Datasheet, PDF (36/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R881869M
Preliminary
Direct RDRAM^™
Control Register: REFB
Address: 041₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 ^REFB4..REFB0
Read/write register.
Reset value is zero (from SETR/CLRR).
Refresh Bank register.
REFB4..REFB0 is the bank that will be refreshed next
during self-refresh. REFB4..0 is incremented after each
self-refresh activate and precharge operation pair.
Control Register: REFR
Address: 042₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000
REFR8..REFR0
Read/write register.
Reset value is zero (from SETR/CLRR).
Refresh Row register.
REFR8..REFR0 is the row that will be refreshed next
by the REFA command or by self-refresh. REFR8..0 is
incremented when BR4..0=11111 for the REFA
command. REFR8..0 is incremented when
REFB4..0=11111 for self-refresh.
Figure 32: REFB Register
Control Register: CCA
Address: 043₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ASYMA
0 0 0 0 0 0 0 0 _{.0 0}
CCA6..CCA0
Read/write register.
Reset value is zero (SETR/CLRR or SIO Reset).
CCA6..CCA0 - Current Control A. Controls the I_OL
output current for the DQA8..DQA0 pins.
ASYMB0 control the asymmetry of the V_OL/V_OH
voltage swing about the V_REF reference voltage for the
DQA8..0 pins.
Figure 34: REFR Register
Control Register: CCB
Address: 044₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ASYMB
0 0 0 0 0 0 0 0 _{..0 0}
CCB6..CCB0
Read/write register.
Reset value is zero (SETR/CLRR or SIO Reset).
CCB6..CCB0 - Current Control B. Controls the I_OL
output current for the DQB8..DQB0 pins.
ASYMB0 control the asymmetry of the V_OL/V_OH
voltage swing about the V_REF reference voltage for the
DQB8..0 pins.
Figure 33: CCA Register
Page 34
Figure 35: CCB Register
Rev. 0.9 Jan. 2000