K4R881869M Datasheet, PDF (45/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R881869M
Preliminary
Direct RDRAM^™
Current and Temperature Control
Figure 51 shows an example of a transaction which performs
current control calibration. It is necessary to perform this
operation once to every RDRAM in every t_CCTRL interval in
order to keep the I_OL output current in its proper range.
This example uses four COLX packets with a CAL
command. These cause the RDRAM to drive four calibra-
tion packets Q(a0) a time t_CAC later. An offset of t_RDTOCC
must be placed between the Q(a0) packet and read data
Q(a1)from the same device. These calibration packets are
driven on the DQA4..3 and DQB4..3 wires. The TSQ bit of
the INIT register is driven on the DQA5 wire during same
interval as the calibration packets. The remaining DQA and
DQB wires are not used during these calibration packets.
The last COLX packet also contains a SAM command
(concatenated with the CAL command). The RDRAM
samples the last calibration packet and adjusts its I_OL current
value.
Unlike REF commands, CAL and SAM commands cannot
be broadcast. This is because the calibration packets from
different devices would interfere. Therefore, a current
control transaction must be sent every t_CCTRL/N, where N is
the number of RDRAMs on the Channel. The device field
Da of the address a0 in the CAL/SAM command should be
incremented after each transaction.
Figure 52 shows an example of a temperature calibration
sequence to the RDRAM. This sequence is broadcast once
every t_TEMP interval to all the RDRAMs on the Channel.
The TCEN and TCAL are ROP commands, and cause the
slew rate of the output drivers to adjust for temperature drift.
During the quiet interval t_TCQUIET the devices being cali-
brated can’t be read, but they can be written.
T₀ T₁ T₂ T₃ T₄ T₅ T₆ T₇ T₈ T₉ T₁₀ T₁₁ T₁₂T₁₃ T₁₄ T₁₅ T₁₆T₁₇ T₁₈ T₁₉ T₂₀T₂₁ T₂₂ T₂₃ T₂₄T₂₅ T₂₆ T₂₇ T₂₈T₂₉ T₃₀ T₃₁ T₃₂T₃₃ T₃₄ T₃₅ T₃₆T₃₇ T₃₈ T₃₉ T₄₀T₄₁ T₄₂ T₄₃ T₄₄T₄₅ T₄₆ T₄₇
CTM/CFM
ROW2
..ROW0
COL4
Read data from the same
device from an earlier RD
command must be at this
packet position or earlier.
Read data from a different
device from an earlier RD
command can be anywhere
prior to the Q(a0) packet. .
t_CCTRL
Read data from a different
device from a later RD
command can be anywhere
after to the Q(a0) packet.
Read data from the same device
from a later RD command must
be at this packet position or
later.
..COL0
DQA8..0
DQB8..0
CAL a0
Q (a1)
CAL a0
CAL a0
t_CAC
CAL/SAM a0
Q (a0)
t_READTOCC
Transaction a0: CAL/SAM
Transaction a1: RD
Transaction a2: CAL/SAM
a0 = {Da, Bx}
a1 = {Da, Bx}
a2 = {Da, Bx}
t_CCSAMTOREAD
Q (a1)
CAL a2
CAL
DQA5 of the first calibrate packet has the inverted TSQ bit of INIT
control register; i.e. logic 0 or high voltage means hot temperature.
When used for monitoring, it should be enabled with the DQA3
bit (current control one value) in case there is no RDRAM present:
HotTemp = DQA5•DQA3
Note that DQB3 could be used instead of DQA3.
Figure 51: Current Control CAL/SAM Transaction Example
T₀ T₁ T₂ T₃ T₄ T₅ T₆ T₇ T₈ T₉ T₁₀ T₁₁ T₁₂T₁₃ T₁₄ T₁₅ T₁₆T₁₇ T₁₈ T₁₉ T₂₀T₂₁ T₂₂ T₂₃ T₂₄T₂₅ T₂₆ T₂₇ T₂₈T₂₉ T₃₀ T₃₁ T₃₂T₃₃ T₃₄ T₃₅ T₃₆T₃₇ T₃₈ T₃₉ T₄₀T₄₁ T₄₂ T₄₃ T₄₄T₄₅ T₄₆ T₄₇
CTM/CFM
ROW2
..ROW0
COL4
..COL0
DQA8..0
DQB8..0
TCEN
TCAL
t_TCEN
t_TCAL
Any ROW packet may be placed
in the gap between the ROW
packets with the TCEN and
TCAL commands.
t_TEMP
t_TCQUIET
No read data from devices
being calibrated
TCEN
Figure 52: Temperature Calibration (TCEN-TCAL) Transactions to RDRAM
Page 43
Rev. 0.9 Jan. 2000