K4R881869M Datasheet, PDF (35/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R881869M
Preliminary
Direct RDRAM^™
Control Register: CNFGB
Address: 024₁₆
..
Read-only register.
15 14 13 12 11 10 9
SVER5..0
0 0 ₌0₀₀₀₀₀0₀ 0 0 0
876
CORG4..0
0 _{= 01}0₀₀₀ 0
543210
SPT DEVTYP2..0 BYT
0 0₁ 0 _{= 0}0₀₀ 0 _B0
BYT - Byte width. B=1 means the device reads and
writes 9-bit memory bytes. B=0 means 8 bits.
DEVTYP2..0 - Device type. DEVTYP = 000 means
that this device is an RDRAM.
SPT - Split-core. SPT=1 means the core is split, SPT=0 means it is not.
CORG4..0 - Core organization. This field specifies the number of bank (5
bits), row (9 bits), and column (7 bits) address bits.
SVER5..0 - Stepping version. Specifies the mask version number of this
device.
Figure 29: CNFGB Register
Control Register: TEST34
Address: 022₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
Read/write register.
Reset value of TEST34 is zero (from SIO Reset)
This register are used for testing purposes. It must not
be read or written after SIO Reset.
Control Register: DEVID
Address: 040₁₆
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 DEVID4..DEVID0
Read/write register.
Reset value is undefined.
Device Identification register.
DEVID4..DEVID0 is compared to DR4..DR0,
DC4..DC0, and DX4..DX0 fields for all memory read
or write transactions. This determines which RDRAM
is selected for the memory read or write transaction.
Figure 30: TEST Register
Figure 31: DEVID Register
Page 33
Rev. 0.9 Jan. 2000