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K4R881869M Datasheet, PDF (20/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM
K4R881869M
Preliminary
Direct RDRAM™
Precharge Mechanisms
Figure 13 shows an example of precharge with the ROWR
packet mechanism. The PRER command must occur a time
tRAS after the ACT command, and a time tRP before the next
ACT command. This timing will serve as a baseline aginst
which the other precharge mechanisms can be compared.
a0 = {Da,Ba,Ra}
a5 = {Da,Ba}
b0 = {Da,Ba,Rb}
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12T13 T14 T15 T16T17 T18 T19 T20T21 T22 T23 T24T25 T26 T27 T28T29 T30 T31 T32T33 T34 T35 T36T37 T38 T39 T40T41 T42 T43 T44T45 T46 T47
CTM/CFM
ROW2
..ROW0
ACT a0
PRER a5
ACT b0
COL4
..COL0
DQA8..0
DQB8..0
tRAS
tRP
tRC
Figure 13: Precharge via PRER Command in ROWR Packet
Figure 14 (top) shows an example of precharge with a RDA
command. A bank is activated with an ROWA packet on the
ROW pins. Then, a series of four dualocts are read with RD
commands in COLC packets on the COL pins. The fourth of
these commands is a RDA, which causes the bank to auto-
matically precharge when the final read has finished. The
timing of this automatic precharge is equivalent to a PRER
command in an ROWR packet on the ROW pins that is
offset a time tOFFP from the COLC packet with the RDA
command. The RDA command should be treated as a RD
command in a COLC packet as well as a simultaneous (but
offset) PRER command in an ROWR packet when analyzing
interactions with other packets.
Figure 14 (middle) shows an example of precharge with a
WRA command. As in the RDA example, a bank is acti-
vated with an ROWA packet on the ROW pins. Then, two
dualocts are written with WR commands in COLC packets
on the COL pins. The second of these commands is a WRA,
which causes the bank to automatically precharge when the
final write has been retired. The timing of this automatic
precharge is equivalent to a PRER command in an ROWR
packet on the ROW pins that is offset a time tOFFP from the
COLC packet that causes the automatic retire. The WRA
command should be treated as a WR command in a COLC
packet as well as a simultaneous (but offset) PRER
command in an ROWR packet when analyzing interactions
with other packets. Note that the automatic retire is triggered
by a COLC packet a time tRTR after the COLC packet with
the WR command unless the second COLC contains a RD
command to the same device. This is described in more
detail in Figure 17.
Figure 14 (bottom) shows an example of precharge with a
PREX command in an COLX packet. A bank is activated
with an ROWA packet on the ROW pins. Then, a series of
four dualocts are read with RD commands in COLC packets
on the COL pins. The fourth of these COLC packets
includes an COLX packet with a PREX command. This
causes the bank to precharge with timing equivalent to a
PRER command in an ROWR packet on the ROW pins that
is offset a time tOFFP from the COLX packet with the PREX
command.
Page 18
Rev. 0.9 Jan. 2000