K4R881869M Datasheet, PDF (16/64 Pages) Samsung semiconductor – 288Mbit RDRAM 512K x 18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R881869M
Preliminary
Direct RDRAM^™
COL-to-COL Packet Interaction
T₀ T₁ T₂ T₃ T₄ T₅ T₆ T₇ T₈ T₉ T₁₀ T₁₁ T₁₂T₁₃ T₁₄ T₁₅ T₁₆T₁₇ T₁₈ T₁₉ T
CTM/CFM
ROW2
..ROW0
COL4
..COL0
t_CCDELAY
COPa a1 COPb b1
COPc c1
DQA8..0
DQB8..0
Transaction a: COPa
Transaction b: COPb
Transaction c: COPc
a1 = {Da,Ba,Ca1}
b1 = {Db,Bb,Cb1}
c1 = {Dc,Bc,Cc1}
Figure 8: COL-to-COL Packet Interaction- Timing
Figure 8 shows three arbitrary packets on the COL pins.
Packets “b” and “c” must be separated by an interval
t_CCDELAY which depends upon the command and address
values in all three packets. Table 12 summarizes the
t_CCDELAY values for all possible cases.
Cases CC1 through CC5 summarize the rules for every situ-
ation other than the case when COPb is a WR command and
COPc is a RD command. In CC3, when a RD command is
followed by a WR command, a gap of t_CAC -t_CWD must be
inserted between the two COL packets. See Figure 4 for
more explanation of why this gap is needed. For cases CC1,
CC2, CC4, and CC5, there is no restriction (t_CCDELAY is
t_CC).
In cases CC6 through CC10, COPb is a WR command and
COPc is a RD command. The t_CCDELAY value needed
between these two packets depends upon the command and
address in the packet with COPa. In particular, in case CC6
when there is WR-WR-RD command sequence directed to
the same device, a gap will be needed between the packets
with COPb and COPc. The gap will need a COLC packet
with a NOCOP command directed to any device in order to
force an automatic retire to take place. Figure 18 (right)
provides a more detailed explanation of this case.
In case CC10, there is a RD-WR-RD sequence directed to
the same device. If a prior write to the same device is unre-
tired when COPa is issued, then a gap will be needed
between the packets with COPb and COPc as in case CC6.
The gap will need a COLC packet with a NOCOP command
directed to any device in order to force an automatic retire to
take place.
Cases CC7, CC8, and CC9 have no restriction (t_CCDELAY is
t_CC).
For the purposes of analyzing COL-to-ROW interactions,
the PREC, WRA, and RDA commands of the COLC packet
are equivalent to the NOCOP, WR, and RD commands.
These commands also cause a precharge operation PREC to
take place. This precharge may be converted to an equiva-
lent PRER command on the ROW pins using the rules
summarized in Figure 14.
Table 12: COL-to-COL Packet Interaction - Rules
Case # COPa Da
Ba Ca1 COPb Db Bb Cb1 COPc Dc
Bc
CC1 xxxx xxxxx x..x x..x NOCOP Db Bb Cb1 xxxx
xxxxx x..x
CC2 xxxx xxxxx x..x x..x RD,WR Db Bb Cb1 NOCOP xxxxx x..x
CC3 xxxx xxxxx x..x x..x RD
Db Bb Cb1 WR
xxxxx x..x
CC4 xxxx xxxxx x..x x..x RD
Db Bb Cb1 RD
xxxxx x..x
CC5 xxxx xxxxx x..x x..x WR
Db Bb Cb1 WR
xxxxx x..x
CC6 WR
== Db x x..x WR
Db Bb Cb1 RD
== Db x..x
CC7 WR
== Db x x..x WR
Db Bb Cb1 RD
/= Db x..x
CC8 WR
/= Db x x..x WR
Db Bb Cb1 RD
== Db x..x
CC9 NOCOP == Db x x..x WR
Db Bb Cb1 RD
== Db x..x
CC10 RD
== Db x x..x WR
Db Bb Cb1 RD
== Db x..x
Cc1 t_CCDELAY
x..x t_CC
x..x t_CC
x..x t_CC+t_CAC -t_CWD
x..x t_CC
x..x t_CC
x..x t_RTR
x..x t_CC
x..x t_CC
x..x t_CC
x..x t_CC
Example
Figure 4
Figure 15
Figure 16
Figure 18
Page 14
Rev. 0.9 Jan. 2000