HD6413003RF Datasheet, PDF (94/715 Pages) Renesas Technology Corp – Microcontroller (MCU)

5.2 Register Descriptions
5.2.1 System Control Register (SYSCR)
SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For bits 7 to 4, see section 17.2, Register Configuration.
For bit 0, see section 15.2, System Control Register (SYSCR).
SYSCR is initialized to H'0B by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
2
1
UE NMIEG —
1
0
1
R/W R/W R/W
0
RAME
1
R/W
Standby timer
select 2 to 0
Software standby
RAM enable
Reserved bit
NMI edge select
Selects the NMI input edge
User bit enable
Selects whether to use CCR bit 6
as a user bit or interrupt mask bit
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