HD6413003RF Datasheet, PDF (286/715 Pages) Renesas Technology Corp – Microcontroller (MCU)

9.9 Port B
9.9.1 Overview
Port B is an 8-bit input/output port that is also used for output (TP₁₅ to TP₈) from the
programmable timing pattern controller (TPC), input/output (TIOCB₄, TIOCB₃, TIOCA₄,
TIOCA₃) and output (TOCXB₄, TOCXA₄) by the 16-bit integrated timer-pulse unit (ITU), input
(DREQ₁, DREQ₀) to the DMA controller (DMAC), and ADTRG input to the A/D converter. Port
B has the same set of pin functions in all operating modes. Figure 9-12 shows the pin
configuration of port B.
Pins in port B can drive one TTL load and a 30-pF capacitive load. They can also drive a
darlington transistor pair. Pins PB₃ to PB₀ have Schmitt-trigger inputs.
Port B
Port B pins
PB ₇ (input/output)/TP₁₅ (output)/DREQ₁ (input)/ADTRG (input)
PB ₆ (input/output)/TP₁₄ (output)/DREQ₀ (input)
PB ₅ (input/output)/TP₁₃ (output)/TOCXB₄ (output)
PB ₄ (input/output)/TP₁₂ (output)/TOCXA₄ (output)
PB ₃ (input/output)/TP₁₁ (output)/TIOCB₄ (input/output)
PB ₂ (input/output)/TP₁₀ (output)/TIOCA₄ (input/output)
PB ₁ (input/output)/TP₉ (output)/TIOCB₃ (input/output)
PB ₀ (input/output)/TP₈ (output)/TIOCA₃ (input/output)
Figure 9-12 Port B Pin Configuration
9.9.2 Register Descriptions
Table 9-15 summarizes the registers of port B.
Table 9-15 Port B Registers
Address*
Name
H'FFD4
Port B data direction register
H'FFD6
Port B data register
Note: * Lower 16 bits of the address.
Abbreviation
PBDDR
PBDR
R/W Initial Value
W
H'00
R/W H'00
268