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HD6413003RF Datasheet, PDF (228/715 Pages) Renesas Technology Corp – Microcontroller (MCU) | |||
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If M (1 to 255) is the size of the block transferred at each request and N (1 to 65,536) is the
number of blocks to be transferred, then ETCRAH and ETCRAL should initially be set to M and
ETCRB should initially be set to N.
Figure 8-10 illustrates how block transfer mode operates. In this figure, bit TMS is cleared to 0,
meaning the block area is the destination.
TA
Block 1
BA
Transfer
Block area
Address T B
Address B B
Block 2
M bytes or words are
transferred per request
Block N
Legend
L A = initial setting of MARA
L B = initial setting of MARB
M = initial setting of ETCRAH and ETCRAL
N = initial setting of ETCRB
TA
BA
=
=
LA
LA +
SAIDE â¢
(â1) SAID
⢠(2 DTSZ
⢠M â 1)
TB = LB
B B = L B + DAIDE ⢠(â1)DAID ⢠(2DTSZ ⢠M â 1)
Figure 8-10 Operation in Block Transfer Mode
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