HD6413003RF Datasheet, PDF (31/715 Pages) Renesas Technology Corp – Microcontroller (MCU)

Table 1-3 Pin Functions (cont)
Type
Refresh
controller
DMA
controller
(DMAC)
16-bit
integrated
time unit
(ITU)
Symbol
RFSH
Pin No.
QFP-112
100
I/O Name and Function
Output Refresh: Indicates a refresh cycle
CS₃
RD
HWR
LWR
DREQ₃ to
DREQ₀
TEND₃ to
TEND₀
TCLKD to
TCLKA
TIOCA₄ to
TIOCA₀
TIOCB₄ to
TIOCB₀
TOCXA₄
TOCXB₄
101
Output Row address strobe RAS: Row address
strobe signal for DRAM connected to area 3
78
Output Column address strobe CAS: Column
address strobe signal for bit DRAM connected
to area 3; used with 2WE DRAM.
Write enable: Write enable signal for DRAM
connected to area 3; used with 2CAS DRAM.
79
Output Upper write: Write enable signal for DRAM
connected to area 3; used with 2WE DRAM.
Upper column address strobe: Column
address strobe signal for DRAM connected to
area 3; used with 2CAS DRAM.
80
Output Lower write: Write enable signal for DRAM
connected to area 3; used with 2WE DRAM.
Lower column address strobe: Column
address strobe signal for DRAM connected to
area 3; used with 2CAS DRAM.
16, 14
9, 8
Input DMA request 3 to 0: DMAC activation
requests
15, 13, Output Transfer end 3 to 0: These signals indicate
106, 105
that the DMAC has ended a data transfer
108 to 105 Input Clock input A to D: External clock inputs
4, 2, 111,
109, 107
5, 3, 112,
110, 108
6
7
Input/ Input capture/output compare A4 to A0:
output GRA4 to GRA0 output compare or input
capture, or PWM output
Input/ Input capture/output compare B4 to B0:
output GRB4 to GRB0 output compare or input
capture, or PWM output
Output Output compare XA4: PWM output
Output Output compare XB4: PWM output
13