HD6413003RF Datasheet, PDF (189/715 Pages) Renesas Technology Corp – Microcontroller (MCU)

7.4 Interrupt Source
Compare match interrupts (CMI) can be generated when the refresh controller is used as an
interval timer. Compare match interrupt requests are masked/unmasked with the CMIE bit of
RTMCSR.
7.5 Usage Notes
When using the DRAM or pseudo-static RAM refresh function, note the following points:
• Refresh cycles are not executed while the bus is released, during software standby mode, and
when a bus cycle is greatly prolonged by insertion of wait states. When these conditions
occur, other means of refreshing are required.
• If refresh requests occur while the bus is released, the first request is held and one refresh
cycle is executed after the bus-released state ends. Figure 7-23 shows the bus cycles in this
case.
Bus-released state Refresh cycle CPU cycle Refresh cycle
ø
RFSH
Refresh
request
BACK
Figure 7-23 Refresh Cycles when Bus is Released
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