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HD6413003RF Datasheet, PDF (547/715 Pages) Renesas Technology Corp – Microcontroller (MCU)
18.2.2 AC Characteristics
Bus timing parameters are listed in table 18-4. Control signal timing parameters are listed in
table 18-5. Refresh controller bus timing parameters are listed in table 18-6. Timing parameters of
the on-chip supporting modules are listed in table 18-7.
Table 18-4 Bus Timing
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VREF = 3.0 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 10 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 16 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
Clock cycle time
Clock low pulse width
Clock high pulse width
Clock rise time
Clock fall time
Address delay time
Address hold time
Address strobe delay
time
Write strobe delay time
Strobe delay time
Write data strobe pulse
width 1
Write data strobe pulse
width 2
Address setup time 1
Address setup time 2
Read data setup time
Read data hold time
Symbol
tCYC
tCL
tCH
tCR
tCF
tAD
tAH
tASD
Condition A Condition B Condition C
8 MHz
10 MHz
16 MHz
Min Max Min Max Min Max
125 500 100 500 62.5 500
40 — 30 — 20 —
40 — 30 — 20 —
— 20 — 15 — 10
— 20 — 15 — 10
— 60 — 50 — 30
25 — 20 — 10 —
— 60 — 40 — 30
Unit
ns
Test
Conditions
Figure 18-4,
Figure 18-5
tWSD
— 60 — 50 — 30
tSD
— 60 — 50 — 30
tWSW1* 85 —
60 —
35 —
tWSW2* 150 —
110 —
65 —
tAS1
tAS2
tRDS
tRDH
20 —
80 —
50 —
0
—
15 —
65 —
35 —
0
—
10 —
40 —
20 —
0
—
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