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| HD6413003RF Datasheet, PDF (239/715 Pages) Renesas Technology Corp – Microcontroller (MCU) | |||
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DREQ
End of 1 block transfer
DMAC cycle
CPU cycle
DMAC cycle
T1 T2 T1 T2 T1 T2 T1 T2 T1 T2 T1 T2 Td T1 T2
A 23 to A 0
RD
HWR , LWR
TEND
Next sampling
Minimum 4 states
Figure 8-18 Timing of DMAC Activation by Falling Edge of DREQ in Block Transfer Mode
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