RX24U Datasheet, PDF (86/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
5.3 AC Characteristics
5.3.1
Clock Timing
5. Electrical Characteristics
Table 5.14 Operating Frequency Value (High-Speed Operating Mode)
Conditions: VCC = 2.7 V to 5.5 V, AVCC0 = AVCC1 = AVCC2 = VREFH0 = VREFH1 = VREFH2 = VCC to 5.5 V,
VSS = AVSS0 = AVSS1 = AVSS2 = VREFL0 = VREFL1 = VREFL2 = 0 V, T_a = –40 to +85°C
Item
Symbol
min.
typ.
max.
Unit
Operating frequency System clock (ICLK)
FlashIF clock (FCLK)*^1, *²
f_max
—
—
80
MHz
—
—
32
Peripheral module clock (PCLKA)
—
—
80
Peripheral module clock (PCLKB)
—
—
40
Peripheral module clock (PCLKD)
—
—
40
Note 1. The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note 2. The frequency accuracy of FCLK should be ±3.5%.
Table 5.15 Operating Frequency Value (Middle-Speed Operating Mode)
Conditions: VCC = 2.7 V to 5.5 V, AVCC0 = AVCC1 = AVCC2 = VREFH0 = VREFH1 = VREFH2 = VCC to 5.5 V,
VSS = AVSS0 = AVSS1 = AVSS2 = VREFL0 = VREFL1 = VREFL2 = 0 V, T_a = –40 to +85°C
Item
Symbol
min.
typ.
max.
Operating frequency System clock (ICLK)
FlashIF clock (FCLK)*^1, *²
f_max
—
—
12
—
—
12
Peripheral module clock (PCLKA)
—
—
12
Peripheral module clock (PCLKB)
—
—
12
Peripheral module clock (PCLKD)
—
—
12
Unit
MHz
Note 1. The lower-limit frequency of FCLK is 1 MHz during programming or erasing of the flash memory. When using FCLK at below
4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.
Note 2. The frequency accuracy of FCLK should be ±3.5%.
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 86 of 131