RX24U Datasheet, PDF (46/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (18/40)
Address
0008 C004h
0008 C005h
0008 C006h
0008 C007h
0008 C008h
0008 C009h
0008 C00Ah
0008 C00Bh
0008 C00Ch
0008 C00Dh
0008 C00Eh
0008 C00Fh
0008 C010h
0008 C020h
0008 C021h
0008 C022h
0008 C023h
0008 C024h
0008 C025h
0008 C026h
0008 C027h
0008 C028h
0008 C029h
0008 C02Ah
0008 C02Bh
0008 C02Ch
0008 C02Dh
0008 C02Eh
0008 C02Fh
0008 C030h
0008 C040h
0008 C041h
0008 C042h
0008 C043h
0008 C044h
0008 C045h
0008 C046h
0008 C047h
0008 C048h
0008 C049h
0008 C04Ah
0008 C04Bh
0008 C04Ch
0008 C04Dh
0008 C04Eh
0008 C04Fh
0008 C050h
0008 C060h
0008 C061h
0008 C062h
0008 C063h
0008 C067h
Module
Symbol
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PORT0
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PORT0
PORT1
PORT2
PORT3
PORT7
Register Name
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Direction Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Output Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Input Data Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Register
Symbol
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PDR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PODR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PIDR
PMR
PMR
PMR
PMR
PMR
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Number of
Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Number of Access Cycles
Access Size ICLK ≥ PCLK
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
8
2 or 3 PCLKB
Page 46 of 131