RX24U Datasheet, PDF (29/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
4.1 I/O Register Addresses (Address Order)
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (1/40)
Address
0008 0000h
0008 0008h
0008 000Ch
0008 0010h
0008 0014h
0008 0018h
0008 0020h
0008 0026h
0008 0028h
0008 002Ah
0008 0031h
0008 0032h
0008 0034h
0008 0035h
0008 0036h
0008 0037h
0008 003Ch
0008 0040h
0008 0041h
0008 00A0h
0008 00A2h
0008 00A5h
0008 00C0h
0008 00C2h
0008 00E0h
0008 00E1h
0008 00E2h
0008 00E3h
0008 03FEh
0008 1000h
0008 1004h
0008 1300h
0008 1304h
0008 1308h
0008 130Ah
0008 1310h
0008 2400h
0008 2404h
0008 2408h
0008 240Ch
0008 240Eh
0008 6400h
0008 6404h
0008 6408h
0008 640Ch
0008 6410h
0008 6414h
0008 6418h
0008 641Ch
Module
Symbol
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
SYSTEM
FLASH
FLASH
BSC
BSC
BSC
BSC
BSC
DTC
DTC
DTC
DTC
DTC
MPU
MPU
MPU
MPU
MPU
MPU
MPU
MPU
Register Name
Mode Monitor Register
System Control Register 1
Standby Control Register
Module Stop Control Register A
Module Stop Control Register B
Module Stop Control Register C
System Clock Control Register
System Clock Control Register 3
PLL Control Register
PLL Control Register 2
Memory Wait Cycle Setting Register
Main Clock Oscillator Control Register
Low-Speed On-Chip Oscillator Control Register
IWDT-Dedicated On-Chip Oscillator Control Register
High-Speed On-Chip Oscillator Control Register
High-Speed On-Chip Oscillator Control Register 2
Oscillation Stabilization Flag Register
Oscillation Stop Detection Control Register
Oscillation Stop Detection Status Register
Operating Power Control Register
Main Clock Oscillator Wait Control Register
High-Speed On-Chip Oscillator Wait Control Register
Reset Status Register 2
Software Reset Register
Voltage Monitoring 1 Circuit Control Register 1
Voltage Monitoring 1 Circuit Status Register
Voltage Monitoring 2 Circuit Control Register 1
Voltage Monitoring 2 Circuit Status Register
Protect Register
ROM Cache Enable Register
ROM Cache Invalidate Register
Bus Error Status Clear Register
Bus Error Monitoring Enable Register
Bus Error Status Register 1
Bus Error Status Register 2
Bus Priority Control Register
DTC Control Register
DTC Vector Base Register
DTC Address Mode Register
DTC Module Start Register
DTC Status Register
Region-0 Start Page Number Register
Region-0 End Page Number Register
Region-1 Start Page Number Register
Region-1 End Page Number Register
Region-2 Start Page Number Register
Region-2 End Page Number Register
Region-3 Start Page Number Register
Region-3 End Page Number Register
Register
Symbol
MDMONR
SYSCR1
SBYCR
MSTPCRA
MSTPCRB
MSTPCRC
SCKCR
SCKCR3
PLLCR
PLLCR2
MEMWAIT
MOSCCR
LOCOCR
ILOCOCR
HOCOCR
HOCOCR2
OSCOVFSR
OSTDCR
OSTDSR
OPCCR
MOSCWTCR
HOCOWTCR
RSTSR2
SWRR
LVD1CR1
LVD1SR
LVD2CR1
LVD2SR
PRCR
ROMCE
ROMCIV
BERCLR
BEREN
BERSR1
BERSR2
BUSPRI
DTCCR
DTCVBR
DTCADMOD
DTCST
DTCSTS
RSPAGE0
REPAGE0
RSPAGE1
REPAGE1
RSPAGE2
REPAGE2
RSPAGE3
REPAGE3
Number of
Bits
16
16
16
32
32
32
32
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
8
8
8
8
16
16
16
8
8
8
16
16
8
32
8
8
16
32
32
32
32
32
32
32
32
Number of Access Cycles
Access Size ICLK ≥ PCLK
16
3 ICLK
16
3 ICLK
16
3 ICLK
32
3 ICLK
32
3 ICLK
32
3 ICLK
32
3 ICLK
16
3 ICLK
16
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
16
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
8
3 ICLK
16
3 ICLK
16
3 ICLK
16
3 ICLK
8
2 ICLK
8
2 ICLK
8
2 ICLK
16
2 ICLK
16
2 ICLK
8
2 ICLK
32
2 ICLK
8
2 ICLK
8
2 ICLK
16
2 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
32
1 ICLK
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 29 of 131