RX24U Datasheet, PDF (60/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (32/40)
Address
000C 1246h
000C 1248h
Module
Symbol
MTU4
MTU4
000C 124Ah MTU4
000C 124Ch
000C 124Dh
000C 1260h
000C 1270h
000C 1272h
000C 1274h
000C 1276h
000C 1280h
000C 1281h
000C 1282h
000C 1284h
000C 1290h
000C 1291h
000C 1292h
000C 1293h
000C 1294h
000C 1296h
000C 1299h
000C 1300h
000C 1301h
000C 1302h
000C 1303h
000C 1304h
000C 1306h
000C 1308h
000C 130Ah
000C 130Ch
000C 130Eh
000C 1320h
000C 1322h
000C 1324h
000C 1326h
000C 1328h
000C 1380h
000C 1381h
000C 1382h
000C 1384h
000C 1385h
000C 1386h
000C 1388h
000C 138Ah
000C 1390h
000C 1391h
000C 1394h
000C 13A0h
000C 13A4h
000C 13A8h
000C 1400h
MTU3
MTU4
MTU
MTU
MTU3
MTU4
MTU4
MTU
MTU
MTU
MTU
MTU0
MTU1
MTU2
MTU3
MTU4
MTU9
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU2
Register Name
Timer A/D Converter Start Request Cycle Set Register B
Timer A/D Converter Start Request Cycle Set Buffer
Register A
Timer A/D Converter Start Request Cycle Set Buffer
Register B
Timer Control Register 2
Timer Control Register 2
Timer Waveform Control Register A
Timer Mode Register 2A
Timer General Register E
Timer General Register E
Timer General Register F
Timer Start Register A
Timer Synchronous Register A
Timer Counter Synchronous Start Register
Timer Read/Write Enable Register A
Noise Filter Control Register 0
Noise Filter Control Register 1
Noise Filter Control Register 2
Noise Filter Control Register 3
Noise Filter Control Register 4
Noise Filter Control Register 9
Noise Filter Control Register C
Timer Control Register
Timer Mode Register 1
Timer I/O Control Register H
Timer I/O Control Register L
Timer Interrupt Enable Register
Timer Counter
Timer General Register A
Timer General Register B
Timer General Register C
Timer General Register D
Timer General Register E
Timer General Register F
Timer Interrupt Enable Register 2
Timer Buffer Operation Transfer Mode Register
Timer Control Register 2
Timer Control Register
Timer Mode Register 1
Timer I/O Control Register
Timer Interrupt Enable Register
Timer Status Register
Timer Counter
Timer General Register A
Timer General Register B
Timer Input Capture Control Register
Timer Mode Register 3
Timer Control Register 2
Timer Longword Counter
Timer Longword General Register
Timer Longword General Register
Timer Control Register
Register
Symbol
TADCORB
TADCOBRA
TADCOBRB
TCR2
TCR2
TWCRA
TMDR2A
TGRE
TGRE
TGRF
TSTRA
TSYRA
TCSYSTR
TRWERA
NFCR0
NFCR1
NFCR2
NFCR3
NFCR4
NFCR9
NFCRC
TCR
TMDR1
TIORH
TIORL
TIER
TCNT
TGRA
TGRB
TGRC
TGRD
TGRE
TGRF
TIER2
TBTM
TCR2
TCR
TMDR1
TIOR
TIER
TSR
TCNT
TGRA
TGRB
TICCR
TMDR3
TCR2
TCNTLW
TGRALW
TGRBLW
TCR
Number of
Bits
16
16
Number of Access Cycles
Access Size ICLK ≥ PCLK
16
4 or 5 PCLKA
16, 32
4 or 5 PCLKA
16
16
4 or 5 PCLKA
8
8
8
8
8
8
8
8
16
16
16
16
16
16
8
8, 16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8, 16, 32
8
8
8
8, 16
8
8
8
8, 16, 32
16
16
16
16, 32
16
16
16
16, 32
16
16
16
16, 32
16
16
8
8, 16
8
8
8
8
8
8, 16
8
8
8
8
8
8, 16, 32
8
8
16
16
16
16, 32
16
16
8
8
8
8
8
8
32
32
32
32
32
32
8
8, 16
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
4 or 5 PCLKA
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 60 of 131