RX24U Datasheet, PDF (10/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
1. Overview
Table 1.4
Pin Functions (2/4)
Classifications Pin Name
I/O
Description
Multi-function
timer pulse unit 3
(MTU3d)
MTIOC9A#, MTIOC9B#,
MTIOC9C#, MTIOC9D#
MTCLKA, MTCLKB,
MTCLKC, MTCLKD
I/O
Input
The TGRA9 to TGRD9 input capture inverted input/output compare
inverted output/PWM inverted output pins.
Input pins for the external clock.
MTCLKA#, MTCLKB#,
MTCLKC#, MTCLKD#
Input Inverted input pins for the external clock.
ADSM0, ADSM1
Output A/D trigger output pins.
General PWM
timer (GPTB)
GTIOC0A, GTIOC0B
I/O
The GPT0.GTGRA and GPT0.GTGRB input capture input/output compare
output/PWM output pins
GTIOC0A#, GTIOC0B#
I/O
The GPT0.GTGRA and GPT0.GTGRB input capture inverted input/output
compare inverted output/PWM inverted output pins
GTIOC1A, GTIOC1B
I/O
The GPT1.GTGRA and GPT1.GTGRB input capture input/output compare
output/PWM output pins
GTIOC1A#, GTIOC1B#
I/O
The GPT1.GTGRA and GPT1.GTGRB input capture inverted input/output
compare inverted output/PWM inverted output pins
GTIOC2A, GTIOC2B
I/O
The GPT2.GTGRA and GPT2.GTGRB input capture input/output compare
output/PWM output pins
GTIOC2A#, GTIOC2B#
I/O
The GPT2.GTGRA and GPT2.GTGRB input capture inverted input/output
compare inverted output/PWM inverted output pins
GTIOC3A, GTIOC3B
I/O
The GPT3.GTGRA and GPT3.GTGRB input capture input/output compare
output/PWM output pins
GTIOC3A#, GTIOC3B#
I/O
The GPT3.GTGRA and GPT3.GTGRB input capture inverted input/output
compare inverted output/PWM inverted output pins
GTETRG
Input External trigger input pin for GPT0 to GPT3
GTECLKA, GTECLKB,
GTECLKC, GTECLKD
Input Input pins A to D for the external clock
GTADSM0, GTADSM1
Output A/D conversion start request monitoring output pins
8-bit timer (TMR) TMO0 to TMO7
Output Compare match output pins.
TMCI0 to TMCI7
Input Input pins for the external clock to be input to the counter.
TMRI0 to TMRI7
Input Counter reset input pins.
Port output
enable 3
(POE3A)
POE0#, POE4#, POE8#,
Input
POE10#, POE11#, POE12#
Input pins for request signals to switch the MTU and GPT pins between
the high impedance state or operation as general I/O port pins
Serial
communications
interface (SCIg)
• Asynchronous mode/clock synchronous mode
SCK1, SCK5, SCK6, SCK8, I/O
SCK9, SCK11
Input/output pins for the clock.
RXD1, RXD5, RXD6, RXD8, Input
RXD9, RXD11
Input pins for received data.
TXD1, TXD5, TXD6, TXD8, Output Output pins for transmitted data.
TXD9, TXD11
CTS1#, CTS5#, CTS6#,
CTS8#, CTS9#, CTS11#
Input Input pins for controlling the start of transmission and reception.
RTS1#, RTS5#, RTS6#,
RTS8#, RTS9#, RTS11#
Output Output pins for controlling the start of transmission and reception.
• Simple I²C mode
SSCL1, SSCL5, SSCL6,
I/O
Input/output pins for the I²C clock.
SSCL8, SSCL9, SSCL11
SSDA1, SSDA5, SSDA6,
I/O
SSDA8, SSDA9, SSDA11
Input/output pins for the I²C data.
• Simple SPI mode
SCK1, SCK5, SCK6, SCK8, I/O
SCK9, SCK11
Input/output pins for the clock.
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
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