RX24U Datasheet, PDF (106/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
5. Electrical Characteristics
RSPI
Simple SPI
SSLA0 to
SSLA3
output
RSPCKA
CPOL = 0
output
RSPCKA
CPOL = 1
output
SCKn
CKPOL = 1
output
SCKn
CKPOL = 0
output
MISOA
input
SMISOn
input
MOSIA
output
SMOSIn
output
(n = 1, 5, 6)
tLEAD
tSU
tH
MSB IN
tOH
tOD
MSB OUT
DATA
DATA
tLAG
tTD
tSSLr, tSSLf
LSB IN
tDr, tDf
LSB OUT
IDLE
MSB IN
MSB OUT
Figure 5.47 RSPI Timing (Master, CPHA = 1) and Simple SPI Clock Timing (Master, CKPH = 0)
RSPI
SSLA0
input
Simple SPI
SSn#
input
RSPCKA
CPOL = 0
input
RSPCKA
CPOL = 1
input
SCKn
CKPOL = 0
input
SCKn
CKPOL = 1
input
MISOA
output
SMISOn
output
MOSIA
input
SMOSIn
input
(n = 1, 5, 6)
tLEAD
tTD
tLAG
tSA
tOH
MSB OUT
tSU
tH
MSB IN
tOD
tREL
DATA
LSB OUT
tDr, tDf
MSB IN
DATA
LSB IN
Figure 5.48 RSPI Timing (Slave, CPHA = 0) and Simple SPI Clock Timing (Slave, CKPH = 1)
MSB OUT
MSB IN
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 106 of 131