RX24U Datasheet, PDF (68/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (40/40)
Address
Module
Symbol
Register Name
Register
Symbol
Number of
Bits
Number of Access Cycles
Access Size ICLK ≥ PCLK
007F C354h FLASHCON Unique ID Register 1
ST
UIDR1
32
32
2 or 3 FCLK
007F C358h FLASHCON Unique ID Register 2
ST
UIDR2
32
32
2 or 3 FCLK
007F C35Ch FLASHCON Unique ID Register 3
ST
UIDR3
32
32
2 or 3 FCLK
007F FFB2h FLASH
Flash P/E Mode Entry Register
FENTRYR
16
16
2 or 3 FCLK
Note 1.
Odd addresses cannot be accessed in 16-bit units. When accessing a register in 16-bit units, access the address of the TMR0, TMR2, TMR4, or TMR6 register. Table 23.5
lists register allocation for 16-bit access in the User’s Manual: Hardware.
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 68 of 131