RX24U Datasheet, PDF (115/131 Pages) Renesas Technology Corp – 32-bit RXv2 CPU core

RX24U Group
5. Electrical Characteristics
5.8 Power-On Reset Circuit and Voltage Detection Circuit Characteristics
Table 5.37 Power-On Reset Circuit and Voltage Detection Circuit Characteristics (1)
Conditions: VCC = 0 V to 5.5 V, AVCC0 = AVCC1 = AVCC2 = VREFH0 = VREFH1 = VREFH2 = VCC to 5.5 V,
VSS = AVSS0 = AVSS1 = AVSS2 = VREFL0 = VREFL1 = VREFL2 = 0 V, T_a = –40 to +85°C
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Voltage detection
level
Power-on reset (POR)
Voltage detection circuit
(LVD0)*¹
Voltage detection circuit
(LVD1)*²
Voltage detection circuit
(LVD2)*³
V_POR
V_{det0_0}
V_{det0_1}
V_{det0_2}
V_{det1_0}
V_{det1_1}
V_{det1_2}
V_{det1_3}
V_{det1_4}
V_{det1_5}
V_{det1_6}
V_{det1_7}
V_{det1_8}
V_{det2_0}
V_{det2_1}
V_{det2_2}
V_{det2_3}
1.35
3.67
2.70
2.37
4.12
3.98
3.86
3.68
2.99
2.89
2.79
2.68
2.57
4.08
3.95
3.82
3.62
1.50
3.84
2.82
2.51
4.29
4.14
4.02
3.84
3.10
3.00
2.90
2.79
2.68
4.29
4.14
4.02
3.84
1.65
3.97
3.00
2.67
4.42
4.28
4.16
3.98
3.29
3.19
3.09
2.98
2.87
4.48
4.35
4.22
4.02
V Figure 5.53, Figure 5.54
V
V Figure 5.56
At falling edge VCC
Figure 5.57
At falling edge VCC
Note:
Note 1.
Note 2.
Note 3.
These characteristics apply when noise is not superimposed on the power supply. When a setting is made so that the voltage
detection level overlaps with that of the voltage detection circuit (LVD2), it cannot be specified which of LVD1 and LVD2 is used
for voltage detection.
n in the symbol V_{det0_n} denotes the value of the LVDS0[1:0] bits.
n in the symbol V_{det1_n} denotes the value of the LVDLVLR.LVD1LVL[3:0] bits.
n in the symbol V_{det2_n} denotes the value of the LVDLVLR.LVD2LVL[3:0] bits.
R01DS0278EJ0100 Rev.1.00
Mar 31, 2017
Page 115 of 131