4524 Datasheet, PDF (83/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
LCD control register L1
at reset : 00002
at power down : state retained
R/W
TAL1/TL1A
Internal dividing resistor for LCD power
L13
supply selection bit (Note 2)
0
2r ✕ 3, 2r ✕ 2
1
r ✕ 3, r ✕ 2
L12
LCD control bit
0
Off
1
On
L11
LCD duty and bias selection bits
L10
L11 L10
00
01
10
11
Duty
1/2
1/3
1/4
Not available
Bias
1/2
1/3
1/3
LCD control register L2
at reset : 11112
at power down : state retained
L23
VLC3/SEG0 pin function switch bit (Note 3)
0
SEG0
1
VLC3
L22
VLC2/SEG1 pin function switch bit (Note 4)
0
SEG1
1
VLC2
L21
VLC1/SEG2 pin function switch bit (Note 4)
0
SEG2
1
VLC1
L20
Internal dividing resistor for LCD power
supply control bit
0
Internal dividing resistor valid
1
Internal dividing resistor invalid
W
TL2A
PU03
PU02
PU01
PU00
Pull-up control register PU0
Port P03 pull-up transistor
control bit
Port P02 pull-up transistor
control bit
Port P01 pull-up transistor
control bit
Port P00 pull-up transistor
control bit
at reset : 00002
at power down : state retained
0
Pull-up transistor OFF
1
Pull-up transistor ON
0
Pull-up transistor OFF
1
Pull-up transistor ON
0
Pull-up transistor OFF
1
Pull-up transistor ON
0
Pull-up transistor OFF
1
Pull-up transistor ON
R/W
TAPU0/
TPU0A
Pull-up control register PU1
at reset : 00002
at power down : state retained
PU13
PU12
Port P13 pull-up transistor
control bit
Port P12 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU11
Port P11 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU10
Port P10 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: “r (resistor) multiplied by 3” is used at 1/3 bias, and “r multiplied by 2” is used at 1/2 bias.
3: VLC3 is connected to VDD internally when SEG0 pin is selected.
4: Use internal dividing resistor when SEG1 and SEG2 pins are selected.
R/W
TAPU1/
TPU1A
Rev.2.00 Jul 27, 2004 page 83 of 159
REJ03B0091-0200Z