4524 Datasheet, PDF (72/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
CLOCK CONTROL
The clock control circuit consists of the following circuits.
• On-chip oscillator (internal oscillator)
• Ceramic resonator
• RC oscillation circuit
• Quartz-crystal oscillation circuit
• Multi-plexer (clock selection circuit)
• Frequency divider
• Internal clock generating circuit
The system clock and the instruction clock are generated as the
source clock for operation by these circuits.
Figure 58 shows the structure of the clock control circuit.
The 4524 Group operates by the on-chip oscillator clock (f(RING))
which is the internal oscillator after system is released from reset.
Also, the ceramic resonator or the RC oscillation can be used for
the main clock (f(XIN)) of the 4524 Group. The CMCK instruction or
CRCK instruction is executed to select the ceramic resonator or
RC oscillator, respectively.
The quartz-crystal oscillator can be used for sub-clock (f(XCIN)).
On-chip oscillator
(internal oscillator)
(Note 1)
RC oscillation
circuit
XIN
XOUT
Ceramic
oscillation circuit
XCIN
XCOUT
Quartz-crystal
oscillation circuit
Multi-plexer
MR0
0
1
QS
QR
Division circuit
Divided by 8
Divided by 4
Divided by 2
MR3, MR2
11
10
01
00
System clock (STCK)
Internal clock
generating circuit
(divided by 3)
Instruction clock
(INSTCK)
Wait time
control circuit
(Note 2)
Program start
signal
QS
R
CRCK instruction
QS
R
MR1
QS
R
EPOF instruction +
CMCK instruction
Internal reset signal
T5F flag
Key-on wakeup signal
POF instruction
QS
R
EPOF instruction + POF2 instruction
Notes 1: System operates by the on-chip oscillator clock (f(RING)) until the CMCK or CRCK instruction is executed
after system is released from reset.
2: The wait time control circuit is used to generate the time required to stabilize the f(XIN) or f(XCIN) oscillation.
After the certain oscillation stabilizing wait time elapses, the program start signal is output.
This circuit operates when system is released from reset or returned from power down.
Fig. 58 Clock control circuit structure
Rev.2.00 Jul 27, 2004 page 72 of 159
REJ03B0091-0200Z