4524 Datasheet, PDF (152/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
RECOMMENDED OPERATING CONDITIONS 2
(Mask ROM version: Ta = –20 °C to 85 °C, VDD = 2 to 5.5 V, unless otherwise noted)
(One Time PROM version: Ta = –20 °C to 85 °C, VDD = 2.5 to 5.5 V, unless otherwise noted)
Symbol
Parameter
f(XIN) Oscillation frequency
(with a ceramic resonator)
Conditions
Min.
Mask ROM
Through mode
VDD = 4 to 5.5 V
version
VDD = 2.7 to 5.5 V
VDD = 2 to 5.5 V
Frequency/2 mode VDD = 2.7 to 5.5 V
VDD = 2 to 5.5 V
Frequency/4, 8 mode VDD = 2 to 5.5 V
One Time PROM Through mode
VDD = 4 to 5.5 V
version
VDD = 2.7 to 5.5 V
VDD = 2.5 to 5.5 V
Frequency/2 mode VDD = 2.7 to 5.5 V
VDD = 2.5 to 5.5 V
Frequency/4, 8 mode VDD = 2.5 to 5.5 V
Limits
Typ.
Max.
6
4.4
2.2
6
4.4
6
6
4.4
2.2
6
4.4
6
Unit
MHz
f(XIN) Oscillation frequency
VDD = 2.7 to 5.5 V
4.4 MHz
f(XIN)
(at RC oscillation) (Note)
Oscillation frequency
(with a ceramic resonator selected,
external clock input)
f(XCIN) Oscillation frequency (sub-clock)
f(CNTR) Timer external input frequency
Mask ROM
Through mode
VDD = 4 to 5.5 V
version
VDD = 2.7 to 5.5 V
VDD = 2 to 5.5 V
Frequency/2 mode VDD = 2.7 to 5.5 V
VDD = 2 to 5.5 V
Frequency/4, 8 mode VDD = 2 to 5.5 V
One Time PROM Through mode
VDD = 4 to 5.5 V
version
VDD = 2.7 to 5.5 V
VDD = 2.5 to 5.5 V
Frequency/2 mode VDD = 2.7 to 5.5 V
VDD = 2.5 to 5.5 V
Frequency/4, 8 mode VDD = 2.5 to 5.5 V
Quartz-crystal oscillator
CNTR0, CNTR1
4.8 MHz
3.2
1.6
4.8
3.2
4.8
4.8
3.2
1.6
4.8
3.2
4.8
50 kHz
f(STCK)/6 Hz
tw(CNTR) Timer external input period
(“H” and “L” pulse width)
CNTR0, CNTR1
3/f(STCK)
s
f(SCK) Serial I/O external input frequency
tw(SCK) Serial I/O external input frequency
(“H” and “L“ pulse width)
TPON Power-on reset circuit
valid supply voltage rising time
SCK
SCK
Mask ROM version
One Time PROM version
3/f(STCK)
VDD = 0 → 2 V
VDD = 0 → 2.5 V
f(STCK)/6 Hz
s
100 µs
100
Note: The frequency is affected by a capacitor, a resistor and a microcomputer. So, set the constants within the range of the frequency limits.
<System clock (STCK) Operating condition map>
➀ When ceramic resonator is used.
f(STCK)
[MHz]
6
➁ When RC oscillation is used.
f(STCK)
[MHz]
➂ When external clock is used.
f(STCK)
[MHz]
4.8
4.4
4.4
Recommended
operating
2.2
condition
3.2
Recommended
operating
condition
1.6
Recommended
operating
condition
VDD
2
2.7
4
5.5 [V]
(2.5)
VDD
2.7
5.5 [V]
VDD
2
2.7
4
5.5 [V]
(2.5)
Rev.2.00 Jul 27, 2004 page 152 of 159
REJ03B0091-0200Z