4524 Datasheet, PDF (10/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
Register Y
Decoder
Skip decision
(SZD instruction)
SD instruction
RD instruction
CLD
instruction
FR20
SQ
R
J11
Serial data input
Register Y
Decoder
SD instruction
CLD
instruction
RD instruction
Serial data output
Register Y
Decoder
Skip decision
(SZD instruction)
S
RQ
FR21
J10
0
1
Skip decision
(SZD instruction)
SD instruction
RD instruction
CLD
instruction
FR22
SQ
R
J11
J10
J13
J12
Synchronous clock (output)
for serial data transfer
Synchronous clock (input)
for serial data transfer
Notes 1:
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
(Note 1)
D4/SIN ^{(Note 2)}
(Note 1)
D5/SOUT (Note 2)
(Note 1)
D6/SCK (Note 2)
Port block diagram (2)
Rev.2.00 Jul 27, 2004 page 10 of 159
REJ03B0091-0200Z