4524 Datasheet, PDF (46/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
A/D CONVERTER (Comparator)
The 4524 Group has a built-in A/D conversion circuit that performs
conversion by 10-bit successive comparison method. Table 11
shows the characteristics of this A/D converter. This A/D converter
can also be used as an 8-bit comparator to compare analog volt-
ages input from the analog input pin with preset values.
Table 11 A/D converter characteristics
Parameter
Characteristics
Conversion format Successive comparison method
Resolution
10 bits
Relative accuracy Linearity error: ±2LSB
Differential non-linearity error: ±0.9LSB
Conversion speed 31 µs (High-speed through-mode at 6.0
MHz oscillation frequency)
Analog input pin
8
Register B (4)
IAP2
(P20–P23)
IAP3
(P30–P33)
OP2A
(P20–P23)
OP3A
(P30–P33)
P20/AIN0
P21/AIN1
P22/AIN2
P23/AIN3
P30/AIN4
P31/AIN5
P32/AIN6
P33/AIN7
Register A (4)
4 ^TAQ1
TQ1A
4 ^TAQ2
TQ2A
4 ^TAQ3
TQ3A
Q13 Q12 Q11 Q10 Q23 Q22 Q21 Q20 ^Q33 Q32 Q31 Q30
Instruction clock
1/6
44
44
2
TALA
8
TABAD
8
TADAB
3
Q13
0
A/D control circuit
1
ADF
(1)
A/D
interrupt
1
Comparator
Successive comparison
0
register (AD) (10)
Q13
10
10
DAC
operation
signal
01
Q13
Q13
8
01
1
8
DA converter
(Note 1)
VDD
VSS
Comparator register (8)
(Note 2)
88
Notes 1: This switch is turned ON only when A/D converter is operating and generates the comparison voltage.
2: Writing/reading data to the comparator register is possible only in the comparator mode (Q13=1).
The value of the comparator register is retained even when the mode is switched to the A/D conversion
mode (Q13=0) because it is separated from the successive comparison register (AD). Also, the resolution
in the comparator mode is 8 bits because the comparator register consists of 8 bits.
Fig. 33 A/D conversion circuit structure
Rev.2.00 Jul 27, 2004 page 46 of 159
REJ03B0091-0200Z