4524 Datasheet, PDF (139/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4524 Group
Skip condition
Datailed description
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V10 = 0: (EXF0) = 1
V11 = 0: (EXF1) = 1
(INT0) = “H”
However, I12 = 1
(INT0) = “L”
However, I12 = 0
– Clears (0) to interrupt enable flag INTE, and disables the interrupt.
– Sets (1) to interrupt enable flag INTE, and enables the interrupt.
– When V10 = 0 : Skips the next instruction when external 0 interrupt request flag EXF0 is “1.” After skipping,
clears (0) to the EXF0 flag. When the EXF0 flag is “0,” executes the next instruction.
When V10 = 1 : This instruction is equivalent to the NOP instruction. (V10: bit 0 of interrupt control register V1)
– When V11 = 0 : Skips the next instruction when external 1 interrupt request flag EXF1 is “1.” After skipping,
clears (0) to the EXF1 flag. When the EXF1 flag is “0,” executes the next instruction.
When V11 = 1 : This instruction is equivalent to the NOP instruction. (V11: bit 1 of interrupt control register V1)
– When I12 = 1 : Skips the next instruction when the level of INT0 pin is “H.” (I12: bit 2 of interrupt control reg-
ister I1)
– When I12 = 0 : Skips the next instruction when the level of INT0 pin is “L.”
(INT1) = “H”
However, I22 = 1
(INT1) = “L”
However, I22 = 0
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– When I22 = 1 : Skips the next instruction when the level of INT1 pin is “H.” (I22: bit 2 of interrupt control reg-
ister I2)
– When I22 = 0 : Skips the next instruction when the level of INT1 pin is “L.”
– Transfers the contents of interrupt control register V1 to register A.
– Transfers the contents of register A to interrupt control register V1.
– Transfers the contents of interrupt control register V2 to register A.
– Transfers the contents of register A to interrupt control register V2.
– Transfers the contents of interrupt control register I1 to register A.
– Transfers the contents of register A to interrupt control register I1.
– Transfers the contents of interrupt control register I2 to register A.
– Transfers the contents of register A to interrupt control register I2.
– Transfers the contents of interrupt control register I3 to the lowermost bit (A0) of register A.
– Transfers the contents of the lowermost bit (A0) of register A to interrupt control register I3.
– Transfers the contents of register A to timer control register PA.
– Transfers the contents of timer control register W1 to register A.
– Transfers the contents of register A to timer control register W1.
– Transfers the contents of timer control register W2 to register A.
– Transfers the contents of register A to timer control register W2.
– Transfers the contents of timer control register W3 to register A.
– Transfers the contents of register A to timer control register W3.
– Transfers the contents of timer control register W4 to register A.
– Transfers the contents of register A to timer control register W4.
Rev.2.00 Jul 27, 2004 page 139 of 159
REJ03B0091-0200Z