4524 Datasheet, PDF(57/161 Page) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

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4524 Datasheet, PDF (57/161 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

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4524 Group

LCD FUNCTION

The 4524 Group has an LCD (Liquid Crystal Display) controller/

driver. When the proper voltage is applied to LCD power supply in-

put pins (VLC1âVLC3) and data are set in timer control register

(W6), timer LC, LCD control registers (L1, L2), and LCD RAM, the

LCD controller/driver automatically reads the display data and con-

trols the LCD display by setting duty and bias.

4 common signal output pins and 20 segment signal output pins

can be used to drive the LCD. By using these pins, up to 80 seg-

ments (when 1/4 duty and 1/3 bias are selected) can be controlled

to display. The LCD power input pins (VLC1âVLC3) are also used as

pins SEG0âSEG2. When SEG0âSEG2. The internal power (VDD) is

used for the LCD power.

(1) Duty and bias

There are 3 combinations of duty and bias for displaying data on

the LCD. Use bits 0 and 1 of LCD control register (L1) to select the

proper display method for the LCD panel being used.

â¢ 1/2 duty, 1/2 bias

â¢ 1/3 duty, 1/3 bias

â¢ 1/4 duty, 1/3 bias

Table 17 Duty and maximum number of displayed pixels

Duty Maximum number of displayed pixels Used COM pins

1/2 40 segments

COM0, COM1 (Note)

1/3 60 segments

COM0âCOM2 (Note)

1/4 80 segments

COM0âCOM3

Note: Leave unused COM pins open.

(2) LCD clock control

The LCD clock is determined by the timer LC count source selec-

tion bit (W62), timer LC control bit (W63), and timer LC.

Accordingly, the LCD clock frequency (F) is obtained by the follow-

ing formula. Numbers (â to â) shown below the formula

correspond to numbers in Figure 42, respectively.

â¢ When using the prescaler output (ORCLK) as timer LC count

source (W62=â1â)

F = ORCLK â LC + 1 â

â¢ When using the bit 4 of timer 5 as timer LC count source (W62=â0â)

F = T54 â LC + 1 â 2

[LC: 0 to 15]

The frame frequency and frame period for each display method

can be obtained by the following formula:

Frame frequency =

(Hz)

Frame period =

(s)

F: LCD clock frequency

1/n: Duty

T54

ORCLK

W62

(Note)

W63

Timer LC (4)

1/2

Reload register RLC

(4)

(TLCA) (TLCA)

Note: Count source is stopped by setting â0â to this bit.

LCD clock

Fig. 42 LCD clock control circuit structure

Rev.2.00 Jul 27, 2004 page 57 of 159

REJ03B0091-0200Z

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