RX634 Datasheet, PDF (68/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory

RX634 Group
5. Electrical Characteristics
Note 1. The values in parentheses indicate when the MONFCR register is set to a value other than A5h (noise filter enabled) while
CECMCLK is selected as the CEC operating clock and RCRMCLK is selected as the RCR operating clock.
Note 2. Time until the clock can be used after the main clock oscillator stop bit (MOSCCR.MOSTP) is set to 0 (operating).
Note 3. When using a main clock, request the oscillator manufacturer to evaluate the oscillator. For the oscillation stabilization time,
refer to the evaluation results obtained from the oscillator manufacturer.
Note 4. The number of cycles n selected by the value of the MOSCWTCR.MSTS[4:0] bits determines the main-clock oscillation
stabilization waiting time in accord with the formula below.
Note 5.
n +16384
t_MAINOSCWT = t_MAINOSC +
f_MAIN
The number of cycles n selected by the value of the PLLWTCR.PSTS[4:0] bits determines the PLL-clock oscillation stabilization
waiting time in accord with the formula below.
t_PLLWT1
= t_PLL1
+
n
+131072
f_PLL
t_PLLWT2
= t_PLL2
+
n
+131072
f_PLL
=
t_MAINOSC
+
t_PLL1
+
n +131072
f_PLL
Figure 5.1
BCLK pin output
t_Bcyc
t_CH
t_Cf
t_CL
t_Cr
Test conditions: V_OH = VCC × 0.7, V_OL = VCC × 0.3, I_OH = 1.0 mA, I_OL = 1.0 mA, C = 30 pF
BCLK Pin Output Timing
t_EXH
t_EXcyc
t_EXL
EXTAL external clock input
t_EXr
t_EXf
Figure 5.2 EXTAL External Clock Input Timing
VCC × 0.5
MOSCCR.MOSTP
Main clock oscillator output
Main clock
t_MAINOSC
t_MAINOSCWT
Figure 5.3 Main Clock Oscillation Start Timing
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 68 of 106