RX634 Datasheet, PDF (52/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory

RX634 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (27 / 34)
Address
0008 C062h
0008 C063h
0008 C065h
0008 C066h
0008 C067h
0008 C068h
0008 C069h
0008 C06Ah
0008 C06Bh
0008 C06Ch
0008 C06Dh
0008 C06Eh
0008 C06Fh
0008 C071h
0008 C072h
0008 C073h
0008 C074h
0008 C080h
0008 C082h
0008 C083h
0008 C084h
0008 C085h
0008 C086h
0008 C087h
0008 C08Ah
0008 C08Bh
0008 C08Ch
0008 C08Eh
0008 C08Fh
0008 C090h
0008 C092h
0008 C094h
0008 C095h
0008 C096h
0008 C097h
0008 C098h
0008 C099h
0008 C09Ch
0008 C09Dh
0008 C0A6h
0008 C0A7h
0008 C0C0h
0008 C0C1h
0008 C0C2h
0008 C0C3h
0008 C0C5h
0008 C0C6h
0008 C0C7h
0008 C0C8h
0008 C0C9h
0008 C0CAh
Module
Symbol
PORT2
PORT3
PORT5
PORT6
PORT7
PORT8
PORT9
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTH
PORTJ
PORTK
PORTL
PORT0
PORT1
PORT1
PORT2
PORT2
PORT3
PORT3
PORT5
PORT5
PORT6
PORT7
PORT7
PORT8
PORT9
PORTA
PORTA
PORTB
PORTB
PORTC
PORTC
PORTE
PORTE
PORTK
PORTK
PORT0
PORT1
PORT2
PORT3
PORT5
PORT6
PORT7
PORT8
PORT9
PORTA
Register Name
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Port Mode Register
Open Drain Control Register 0
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 0
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Open Drain Control Register 0
Open Drain Control Register 1
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Pull-Up Control Register
Register
Symbol
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
PMR
ODR0
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR0
ODR1
ODR0
ODR0
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
ODR0
ODR1
PCR
PCR
PCR
PCR
PCR
PCR
PCR
PCR
PCR
PCR
Number
of Bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Access
Size
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8, 16
8
8
8
8
8
8
8
8
8
8
Number of Access Cycles
ICLK ≥
PCLK
ICLK <
PCLK
Related
Function
2 to 3PCLKB 2 ICLK I/O Ports
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
Remarks
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 52 of 106