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| RX634 Datasheet, PDF (23/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory | |||
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RX634 Group
3. Address Space
3.2 External Address Space
The external address space is divided into up to four CS areas (CS0 to CS3), each corresponding to the CSn# signal
output from a CSn# (n = 0 to 3) pin.
Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS3) in on-chip ROM disabled
extended mode.
On-chip ROM disabled
extended mode
0000 0000h
0002 0000h
0008 0000h
0010 0000h
On-chip RAM
Reserved area*1
Peripheral I/O registers
Reserved area*1
0100 0000h
0500 0000h
0800 0000h
Reserved area*1
External address space
Reserved area*1
0500 0000h
05FF FFFFh
0600 0000h
06FF FFFFh
0700 0000h
07FF FFFFh
CS3 (16 MB)
CS2 (16 MB)
CS1 (16 MB)
FF00 0000h
FF00 0000h
External address space*2
FFFF FFFFh
FFFF FFFFh
CS0 (16 MB)
Note 1. Reserved areas should not be accessed.
Note 2. The CS0 area is disabled in on-chip ROM enabled extended mode. In this mode, the address space for
addresses above 0800 0000h is as shown in figure on this section âMemory Map in Each Operating Modeâ.
Figure 3.2
Correspondence between External Address Spaces and CS Areas
(In On-Chip ROM Disabled Extended Mode)
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 23 of 106
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