English
Language : 

RX634 Datasheet, PDF (66/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory
◁
RX634 Group
5. Electrical Characteristics
5.3 AC Characteristics
Table 5.14 Operation Frequency Value (High-Speed Operating Mode)
Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Item
Symbol
Min.
Typ.
Max.
Unit
Operating
frequency
System clock (ICLK)
FlashIF clock (FCLK)*1
fmax
—
—
54
MHz
—
—
32
Peripheral module clock (PCLKB)
—
—
32
Peripheral module clock (PCLKD)*2
—
—
54
External bus clock (BCLK)
—
—
54
BCLK pin output
—
—
27
Note 1. The lower-limit frequency of FCLK is 4 MHz during programming or erasing of the flash memory.
Note 2. The lower-limit frequency of PCLKD is 1 MHz when the A/D converter is in use.
Table 5.15 Operation Frequency Value (Low-Speed Operating Mode 1)
Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Item
Symbol
Min.
Typ.
Max.
Unit
Operating
frequency
System clock (ICLK)
FlashIF clock (FCLK)*1
fmax
—
—
—
—
1
MHz
1
Peripheral module clock (PCLKB)
—
—
1
Peripheral module clock (PCLKD)*2
—
—
1
External bus clock (BCLK)
—
—
1
BCLK pin output
—
—
1
Note 1. Programming and erasing the flash memory is impossible.
Note 2. The lower-limit frequency of PCLKD is 1 MHz when the A/D converter is in use.
Table 5.16 Operation Frequency Value (Low-Speed Operating Mode 2)
Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V,
Ta = –40 to +85°C
Item
Symbol
Min.
Typ.
Max.
Unit
Operating
frequency
System clock (ICLK)
FlashIF clock (FCLK)*1
fmax
—
—
—
143.75
kHz
—
143.75
Peripheral module clock (PCLKB)
—
—
143.75
Peripheral module clock (PCLKD)*2
—
—
143.75
External bus clock (BCLK)
—
—
143.75
BCLK pin output
—
—
143.75
Note 1. Programming and erasing the flash memory is impossible.
Note 2. The A/D converter cannot be used.
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 66 of 106
 ▷