RX634 Datasheet, PDF (27/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory

RX634 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (2 / 34)
Address
0008 201Ch
0008 201Dh
0008 201Eh
0008 201Fh
Module
Symbol
DMAC0
DMAC0
DMAC0
DMAC0
0008 2040h
0008 2044h
0008 2048h
0008 204Ch
0008 2050h
0008 2053h
0008 2054h
0008 205Ch
0008 205Dh
0008 205Eh
0008 205Fh
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
DMAC1
0008 2080h
0008 2084h
0008 2088h
0008 208Ch
0008 2090h
0008 2093h
0008 2094h
0008 209Ch
0008 209Dh
0008 209Eh
0008 209Fh
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
DMAC2
0008 20C0h
0008 20C4h
0008 20C8h
0008 20CCh
0008 20D0h
0008 20D3h
0008 20D4h
0008 20DCh
0008 20DDh
0008 20DEh
0008 20DFh
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
DMAC3
0008 2200h
0008 2400h
0008 2404h
0008 2408h
0008 240Ch
0008 240Eh
0008 3002h
0008 3004h
0008 3008h
0008 3012h
0008 3014h
0008 3018h
DMAC
DTC
DTC
DTC
DTC
DTC
BSC
BSC
BSC
BSC
BSC
BSC
Register Name
DMA Transfer Enable Register
DMA Software Start Register
DMA Status Register
DMA Activation Source Flag Control
Register
DMA Source Address Register
DMA Destination Address Register
DMA Transfer Count Register
DMA Block Transfer Count Register
DMA Transfer Mode Register
DMA Interrupt Setting Register
DMA Address Mode Register
DMA Transfer Enable Register
DMA Software Start Register
DMA Status Register
DMA Activation Source Flag Control
Register
DMA Source Address Register
DMA Destination Address Register
DMA Transfer Count Register
DMA Block Transfer Count Register
DMA Transfer Mode Register
DMA Interrupt Setting Register
DMA Address Mode Register
DMA Transfer Enable Register
DMA Software Start Register
DMA Status Register
DMA Activation Source Flag Control
Register
DMA Source Address Register
DMA Destination Address Register
DMA Transfer Count Register
DMA Block Transfer Count Register
DMA Transfer Mode Register
DMA Interrupt Setting Register
DMA Address Mode Register
DMA Transfer Enable Register
DMA Software Start Register
DMA Status Register
DMA Activation Source Flag Control
Register
DMA Module Activation Register
DTC Control Register
DTC Vector Base Register
DTC Address Mode Register
DTC Module Start Register
DTC Status Register
CS0 Mode Register
CS0 Wait Control Register 1
CS0 Wait Control Register 2
CS1 Mode Register
CS1 Wait Control Register 1
CS1 Wait Control Register 2
Register
Symbol
DMCNT
DMREQ
DMSTS
DMCSL
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
DMAMD
DMCNT
DMREQ
DMSTS
DMCSL
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
DMAMD
DMCNT
DMREQ
DMSTS
DMCSL
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
DMAMD
DMCNT
DMREQ
DMSTS
DMCSL
DMAST
DTCCR
DTCVBR
DTCADMOD
DTCST
DTCSTS
CS0MOD
CS0WCR1
CS0WCR2
CS1MOD
CS1WCR1
CS1WCR2
Number
of Bits
8
8
8
8
Access
Size
8
8
8
8
Number of Access Cycles
ICLK ≥
PCLK
ICLK <
PCLK
Related
Function
2 ICLK
DMACA
2 ICLK
2 ICLK
2 ICLK
32
32
32
32
32
32
16
16
16
16
8
8
16
16
8
8
8
8
8
8
8
8
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
32
32
32
32
32
32
16
16
16
16
8
8
16
16
8
8
8
8
8
8
8
8
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
32
32
32
32
32
32
16
16
16
16
8
8
16
16
8
8
8
8
8
8
8
8
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
8
8
8
8
32
32
8
8
8
8
16
16
16
16
32
32
32
32
16
16
32
32
32
32
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
1 to 2BCLK
1 to 2BCLK
1 to 2BCLK
1 to 2BCLK
1 to 2BCLK
1 to 2BCLK
DTCa
Buses
Remarks
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 27 of 106