RX634 Datasheet, PDF (100/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory

RX634 Group
5. Electrical Characteristics
5.8 ROM (Flash Memory for Code Storage) Characteristics
Table 5.37 ROM (Flash Memory for Code Storage) Characteristics (1)
Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V
Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +85°C T_a is common to both conditions 1 and 2.
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Reprogramming/erasure cycle*¹
N_pec
1000
—
Data hold time
t_DRP
30*²
—
—
Times
—
Year
T_a = +85°C
Note 1. Definition of reprogram/erase cycle: The reprogram/erase cycle is the number of erasing for each block. When the reprogram/
erase cycle is n times (n = 1000), erasing can be performed n times for each block. For instance, when 128-byte programming
is performed 16 times for different addresses in 2-Kbyte block and then the entire block is erased, the reprogram/erase cycle is
counted as one. However, programming the same address for several times as one erasing is not enabled (overwriting is
prohibited).
Note 2. This result is obtained from reliability testing.
Table 5.38 ROM (Flash Memory for Code Storage) Characteristics (2)
Note: The standard values of the items with no conditions specified in the table are common to conditions 1 and 2.
Conditions 1: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V
Conditions 2: VCC = AVCC0 = VREFH0 = 4.0 to 5.5 V, VREFH = 4.0 V to AVCC0, VSS = AVSS0 = VREFL = VREFL0 = 0 V
Temperature range for the programming/erasure operation: T_a = –40 to +85°C T_a is common to both conditions 1 and 2.
FCLK = 4 MHz
20 MHz ≤ FCLK ≤ 32 MHz
Item
Symbol Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Programming time
128 bytes
when N_PEC ≤ 100 times _{4 Kbytes}
t_P128
—
2.8
28
—
1
10
ms
t_P4K
—
63
140
—
23
50
ms
16 Kbytes
t_P16K
—
252
560
—
90
200
ms
Programming time
128 bytes
when N_PEC > 100 times _{4 Kbytes}
t_P128
—
3.4
33.6
—
1.2
12
ms
t_P4K
—
75.6
168
—
27.6
60
ms
16 Kbytes
t_P16K
—
302.4
672
—
108
240
ms
Erasure time
4 Kbytes
when N_PEC ≤ 100 times _{16 Kbytes}
t_E4K
—
50
120
—
25
60
ms
t_E16K
—
200
480
—
100
240
ms
Erasure time
4 Kbytes
when N_PEC > 100 times _{16 Kbytes}
t_E4K
—
60
144
—
30
72
ms
t_E16K
—
240
576
—
120
288
ms
Suspend delay time during programming
t_SPD
—
—
400
—
—
120
μs
First suspend delay time during erasing
t_SESD1
—
(in suspend priority mode)
—
300
—
—
120
μs
Second suspend delay time during erasing t_SESD2
—
—
1.7
—
—
1.7
ms
(in suspend priority mode)
Suspend delay time during erasing
(in erasure priority mode)
t_SEED
—
—
1.7
—
—
1.7
ms
FCU reset time
t_FCUR
35
—
—
35
—
—
μs
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 100 of 106