RX634 Datasheet, PDF (40/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory

RX634 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (15 / 34)
Address
0008 8168h
0008 816Ah
0008 81E6h
0008 81E7h
0008 81E8h
0008 81E9h
0008 81EAh
0008 81EBh
0008 81ECh
0008 81EDh
0008 81EEh
0008 81EFh
0008 8200h
0008 8201h
0008 8202h
0008 8203h
0008 8204h
0008 8205h
0008 8206h
0008 8207h
0008 8208h
0008 8209h
0008 820Ah
0008 820Bh
0008 820Ch
0008 8210h
0008 8211h
0008 8212h
0008 8213h
0008 8214h
0008 8215h
0008 8216h
0008 8217h
0008 8218h
0008 8219h
0008 821Ah
0008 821Bh
0008 821Ch
0008 8280h
0008 8281h
0008 8282h
0008 8300h
0008 8301h
0008 8302h
0008 8303h
0008 8304h
0008 8305h
0008 8306h
0008 8307h
0008 8308h
0008 8309h
Module
Symbol
TPU5
TPU5
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
PPG0
TMR0
TMR1
TMR0
TMR1
TMR0
TMR1
TMR0
TMR1
TMR0
TMR1
TMR0
TMR1
TMR0
TMR2
TMR3
TMR2
TMR3
TMR2
TMR3
TMR2
TMR3
TMR2
TMR3
TMR2
TMR3
TMR2
CRC
CRC
CRC
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
Register Name
Timer General Register A
Timer General Register B
PPG Output Control Register
PPG Output Mode Register
Next Data Enable Registers H
Next Data Enable Registers L
Output Data Registers H
Output Data Registers L
Next Data Registers H
Next Data Registers L
Next Data Registers H
Next Data Registers L
Timer Control Register
Timer Control Register
Timer Control/Status Register
Timer Control/Status Register
Time Constant Register A
Time Constant Register A
Time Constant Register B
Time Constant Register B
Timer Counter
Timer Counter
Timer Counter Control Register
Timer Counter Control Register
Time Count Start Register
Timer Control Register
Timer Control Register
Timer Control/Status Register
Timer Control/Status Register
Time Constant Register A
Time Constant Register A
Time Constant Register B
Time Constant Register B
Timer Counter
Timer Counter
Timer Counter Control Register
Timer Counter Control Register
Time Count Start Register
CRC Control Register
CRC Data Input Register
CRC Data Output Register
I²C Bus Control Register 1
I²C Bus Control Register 2
I²C Bus Mode Register 1
I²C Bus Mode Register 2
I²C Bus Mode Register 3
I²C Bus Function Enable Register
I²C Bus Status Enable Register
I²C Bus Interrupt Enable Register
I²C Bus Status Register 1
I²C Bus Status Register 2
Register
Symbol
TGRA
TGRB
PCR
PMR
NDERH
NDERL
PODRH
PODRL
NDRH
NDRL
NDRH2
NDRL2
TCR
TCR
TCSR
TCSR
TCORA
TCORA
TCORB
TCORB
TCNT
TCNT
TCCR
TCCR
TCSTR
TCR
TCR
TCSR
TCSR
TCORA
TCORA
TCORB
TCORB
TCNT
TCNT
TCCR
TCCR
TCSTR
CRCCR
CRCDIR
CRCDOR
ICCR1
ICCR2
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
ICSR1
ICSR2
Number
of Bits
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
16
8
8
8
8
8
8
8
8
8
8
Access
Size
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8*¹
8
8*¹
8
8*¹
8
8*¹
8
8
8
8
8
8
8*¹
8
8*¹
8
8*¹
8
8*¹
8
8
8
16
8
8
8
8
8
8
8
8
8
8
Number of Access Cycles
ICLK ≥
PCLK
ICLK <
PCLK
Related
Function
2 to 3PCLKB 2 ICLK TPUa
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK PPG
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK TMR
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK CRC
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK RIIC
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
Remarks
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 40 of 106