English
Language : 

RX634 Datasheet, PDF (44/106 Pages) Renesas Technology Corp – 54 MHz 32-bit RX MCU with FPU, 90 DMIPS, up to 2-Mbyte flash memory
RX634 Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (19 / 34)
Address
0008 8694h
0008 8695h
0008 8700h
0008 8701h
0008 8702h
0008 8703h
0008 8704h
0008 8705h
0008 8706h
0008 8708h
0008 870Ah
0008 870Ch
0008 870Eh
0008 8720h
0008 8722h
0008 8724h
0008 8726h
Module
Symbol
MTU4
MTU5
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
MTU0
0008 8780h
0008 8781h
0008 8782h
0008 8784h
0008 8785h
0008 8786h
0008 8788h
0008 878Ah
0008 8790h
0008 8800h
0008 8801h
0008 8802h
0008 8804h
0008 8805h
0008 8806h
0008 8808h
0008 880Ah
0008 8880h
0008 8882h
0008 8884h
0008 8886h
0008 8890h
0008 8892h
0008 8894h
0008 8896h
0008 88A0h
0008 88A2h
0008 88A4h
0008 88A6h
0008 88B2h
0008 88B4h
0008 88B6h
0008 8900h
0008 8902h
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU1
MTU2
MTU2
MTU2
MTU2
MTU2
MTU2
MTU2
MTU2
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
MTU5
POE
POE
Register Name
Noise Filter Control Register
Noise Filter Control Register
Timer Control Register
Timer Mode Register
Timer I/O Control Register H
Timer I/O Control Register L
Timer Interrupt Enable Register
Timer Status Register
Timer Counter
Timer General Register A
Timer General Register B
Timer General Register C
Timer General Register D
Timer General Register E
Timer General Register F
Timer Interrupt Enable Register 2
Timer Buffer Operation Transfer Mode
Register
Timer Control Register
Timer Mode Register
Timer I/O Control Register
Timer Interrupt Enable Register
Timer Status Register
Timer Counter
Timer General Register A
Timer General Register B
Timer Input Capture Control Register
Timer Control Register
Timer Mode Register
Timer I/O Control Register
Timer Interrupt Enable Register
Timer Status Register
Timer Counter
Timer General Register A
Timer General Register B
Timer Counter U
Timer General Register U
Timer Control Register U
Timer I/O Control Register U
Timer Counter V
Timer General Register V
Timer Control Register V
Timer I/O Control Register V
Timer Counter W
Timer General Register W
Timer Control Register W
Timer I/O Control Register W
Timer Interrupt Enable Register
Timer Start Register
Timer Compare Match Clear Register
Input Level Control/Status Register 1
Output Level Control/Status Register 1
Register
Symbol
NFCR
NFCR
TCR
TMDR
TIORH
TIORL
TIER
TSR
TCNT
TGRA
TGRB
TGRC
TGRD
TGRE
TGRF
TIER2
TBTM
Number
of Bits
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
8
8
Access
Size
8, 16
8, 16
8
8
8
8
8
8
16
16
16
16
16
16
16
8
8
Number of Access Cycles
ICLK ≥
PCLK
ICLK <
PCLK
Related
Function
2 to 3PCLKB 2 ICLK MTU2a
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
2 to 3PCLKB 2 ICLK
TCR
8
TMDR
8
TIOR
8
TIER
8
TSR
8
TCNT
16
TGRA
16
TGRB
16
TICCR
8
TCR
8
TMDR
8
TIOR
8
TIER
8
TSR
8
TCNT
16
TGRA
16
TGRB
16
TCNTU
16
TGRU
16
TCRU
8
TIORU
8
TCNTV
16
TGRV
16
TCRV
8
TIORV
8
TCNTW
16
TGRW
16
TCRW
8
TIORW
8
TIER
8
TSTR
8
TCNTCMPCLR
8
ICSR1
16
OCSR1
16
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
8
2 to 3PCLKB 2 ICLK
16
2 to 3PCLKB 2 ICLK POE2a
16
2 to 3PCLKB 2 ICLK
Remarks
R01DS0255EJ0100 Rev.1.00
Feb 25, 2015
Page 44 of 106