4571 Datasheet, PDF (55/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4571 Group
LIST OF PRECAUTIONS
(1) Noise and latch-up prevention
Connect a capacitor on the following condition to prevent noise
and latch-up;
• connect a bypass capacitor (approx. 0.1 µF) between pins VDD
and VSS at the shortest distance,
• equalize its wiring in width and length, and
• use relatively thick wire.
Port K is also used as VPP pin. Accordingly, when using this pin,
connect this pin to VSS or VDD. Do not leave this pin open. When
port is used for key matrix, connect it to VDD through a pull-up
resistor.
(2) Note on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and
may perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the supply voltage is less than the
recommended operating conditions and design a system not to
cause errors to the system by this unstable operation.
(3) Register initial values 1
The initial value of the following registers are undefined after
system is released from reset. After system is released from reset,
set initial values.
• Register Z (2 bits)
• Register D (3 bits)
• Register E (8 bits)
(4) Register initial values 2
The initial value of the following registers are undefined at RAM
back-up. After system is returned from RAM back-up, set initial
values.
• Register Z (2 bits)
• Register X (4 bits)
• Register Y (4 bits)
• Register D (3 bits)
• Register E (8 bits)
(7) Multifunction
• The input of D4 can be used even when CNTR0 (output) is
selected. The input/output of D4 can be used even when
CNTR0 (input) is selected. Be careful when using inputs of
both CNTR0 and D4 since the input threshold value of CNTR0
pin is different from that of port D4.
• “H” output function of port C can be used even when the
CNTR1 (output) is used.
• The input/output of P20 can be used even when INT0 is used.
Be careful when using inputs of both INT0 and P20 since the
input threshold value of INT0 pin is different from that of port
P20.
• The input/output of P21 can be used even when INT1 is used.
Be careful when using inputs of both INT1 and P21 since the
input threshold value of INT1 pin is different from that of port
P21.
(8) Power-on reset
When the built-in power-on reset circuit is used, set the time for
the supply voltage to rise from 0 V to the minimum voltage of
recommended operating conditions to 100 µs or less.
If the rising time exceeds 100 µs, connect a capacitor between
the RESET pin and Vss at the shortest distance, and input “L”
level to RESET pin until the value of supply voltage reaches the
minimum operating voltage.
(9) POF instruction
When the POF instruction is executed continuously after the
EPOF instruction, system enters the RAM back-up state.
Note that system cannot enter the RAM back-up state when
executing only the POF instruction.
Be sure to disable interrupts by executing the DI instruction
before executing the EPOF instruction and the POF instruction
continuously.
(5) Program counter
Make sure that the PCH does not specify after the last page of the
built-in ROM.
(6) Stack registers (SKS)
Stack registers (SKs) are eight identical registers, so that
subroutines can be nested up to 8 levels. However, one of stack
registers is used respectively when using an interrupt service
routine and when executing a table reference instruction.
Accordingly, be careful not to over the stack when performing
these operations together.
Rev.1.02 May 25, 2007 Page 55 of 124
REJ03B0179-0102