4571 Datasheet, PDF (120/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4571 Group
Recommended operating conditions
Table 26 Recommended operating conditions 1 (Ta = –20 °C to 85 °C, VDD = 1.8 to 5.5 V, unless otherwise noted)
Symbol
Parameter
Conditions
VDD
VDD
VRAM
VSS
VIH
Supply voltage
(with a ceramic resonator)
Supply voltage
(when an external clock is
used)
RAM back-up voltage
Supply voltage
“H” level input voltage
f(STCK) ≤ 6MHz
f(STCK) ≤ 4.4MHz
f(STCK) ≤ 2.2MHz
f(STCK) ≤ 1.1MHz
f(STCK) ≤ 4.8MHz
f(STCK) ≤ 3.2MHz
f(STCK) ≤ 1.6MHz
f(STCK) ≤ 0.8MHz
(at RAM back-up)
P0, P1, P2, P3, D0–D4, K
XIN
RESET, INT0, INT1
CNTR0
VIL
“L” level input voltage
P0, P1, P2, P3, D0–D4, K
XIN
IOH(peak)
IOH(avg)
IOL(peak)
IOL(avg)
ΣIOH(avg)
ΣIOL(avg)
RESET, INT0, INT1
CNTR0
“H” level peak output current P3, D0–D3
VDD = 5V
VDD = 3V
C, CNTR1
VDD = 5V
VDD = 3V
“H” level average output current P3, D0–D3
(Note 1)
VDD = 5V
VDD = 3V
C, CNTR1
VDD = 5V
VDD = 3V
“L” level peak output current
P0, P1, P2, P3, D0–D4, C,
RESET, CNTR0, CNTR1,
VDD = 5V
VDD = 3V
“L” level average output current _{P0, P1, P2, P3, D0–D4, C,}
(Note 1)
RESET, CNTR0, CNTR1,
VDD = 5V
VDD = 3V
“H” level total average current P3, D0–D3, C, CNTR1
“L” level total average current _{P0, P10, P11, RESET}
P10, P11, P2, P3, D0–D4, C, CNTR0, CNTR1
Note 1.The average output current is the average value during 100ms.
Limits
Unit
Min. Typ. Max.
4
5.5
V
2.7
5.5
2
5.5
1.8
5.5
4
5.5
V
2.7
5.5
2
5.5
1.8
5.5
1.6
5.5
V
0
V
0.8VDD
VDD
V
0.7VDD
VDD
0.85VDD
VDD
0.85VDD
0
0
0
VDD
0.3VDD mA
0.3VDD
0.3VDD
0
0.15VDD
−20 mA
−10
−30
−15
−10 mA
−5
−15
−7
24 mA
12
12 mA
6
−30 mA
30 mA
30
Rev.1.02 May 25, 2007 Page 120 of 124
REJ03B0179-0102