4571 Datasheet, PDF (31/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4571 Group
(1) Timer control registers
• Timer control register PA
Register PA controls the count operation and count source of
prescaler. Set the contents of this register through register A
with the TPAA instruction.
• Timer control register W1
Register W1 controls the count operation and count source of
timer 1, and timer 1 count auto-stop circuit. Set the contents of
this register through register A with the TW1A instruction.
The TAW1 instruction can be used to transfer the contents of
register W1 to register A.
• Timer control register W2
Register W2 controls the count operation and count source of
timer 2, and CNTR0 pin output signal function. Set the
contents of this register through register A with the TW2A
instruction. The TAW2 instruction can be used to transfer the
contents of register W2 to register A.
• Timer control register W3
Register W3 controls timer 3 count source, timer 3 count
operation, CNTR1 pin output and PWM signal “H” interval
expansion function. Set the contents of this register through
register A with the TW3A instruction. The TAW3 instruction
can be used to transfer the contents of register W3 to register
A.
• Timer control register W5
Register W5 controls the input count edge of CNTR0 pin, the
timer 1 count start synchronous circuit, CNTR1 pin output
auto-control circuit and the D4/CNTR1 pin function. Set the
contents of this register through register A with the TW5A
instruction. The TAW5 instruction can be used to transfer the
contents of register W5 to register A.
(2) Prescaler
Prescaler is an 8-bit binary down counter with the prescaler
reload register RPS. Data can be set simultaneously in prescaler
and the reload register RPS with the TPSAB instruction. Data
can be read from reload register RPS with the TABPS
instruction.
Stop counting and then execute the TPSAB or TABPS
instruction to read or set prescaler data.
Prescaler starts counting after the following process;
(1) set data in prescaler, and
(2) set the bit 0 of register PA to “1.”
When a value set in reload register RPS is n, prescaler divides the
count source signal by n + 1 (n = 0 to 255).
Count source for prescaler can be selected the instruction clock
(INSTCK) or the instruction clock (INSTCK)/4.
Once count is started, when prescaler underflows (the next count
pulse is input after the contents of prescaler becomes “0”), new
data is loaded from reload register RPS, and count continues
(auto-reload function).
The output signal (ORCLK) of prescaler can be used for timer 1
and 2 count sources.
(3) Timer 1 (interrupt function)
Timer 1 is an 8-bit binary down counter with a timer 1 reload
register (R1). Data can be set simultaneously in timer 1 and the
reload register R1 with the TR1AB instruction. Data can be read
from timer 1 with the TAB1 instruction.
Stop counting and then execute the T1AB or TAB1 instruction to
read or set timer 1 data.
When executing the TR1AB instruction to set data to reload
register R1 while timer 1 is operating, avoid a timing when timer
1 underflows.
Timer 1 starts counting after the following process;
(1) set data in timer 1
(2) set count source by bits 0 and 1 of register W1, and
(3) set the bit 2 of register W1 to “1.”
When a value set in reload register R1 is n, timer 1 divides the
count source signal by n + 1 (n = 0 to 255).
Once count is started, when timer 1 underflows (the next count
pulse is input after the contents of timer 1 becomes “0”), the
timer 1 interrupt request flag (T1F) is set to “1,” new data is
loaded from reload register R1, and count continues (auto-reload
function).
After timer 1 control by INT0 pin is enabled by setting the bit 0
of register I1 to “1”, INT0 pin input can be used as the start
trigger for timer 1 count operation by setting the bit 3 of register
W5 to “1”.
Also, in this time, the auto-stop function by timer 1 underflow
can be performed by setting the bit 3 of register W1 to “1.”
The timer 1 underflow signal divided by 2 can be output from the
CNTR0 pin by setting the bit 0 of register W5 to “1” and bit 3 of
register W2 to “0”.
(4) Timer 2 (interrupt function)
Timer 2 is an 8-bit binary down counter with timer 2 reload
register (R2). Data can be set simultaneously in timer 2 and the
reload register R2 with the T2AB instruction. Data can be read
from timer 2 with the TAB2 instruction.
Stop counting and then execute the T2AB or TAB2 instruction to
read or set timer 2 data.
Timer 2 starts counting after the following process;
(1) set data in timer 2
(2) set count source by bits 0 and 1 of register W2, and
(3) set the bit 2 of register W2 to “1.”
When a value set in reload register R2 is n, timer 2 divides the
count source signal by n + 1 (n = 0 to 255).
Once count is started, when timer 2 underflows (the next count
pulse is input after the contents of timer 2 becomes “0”), the
timer 2 interrupt request flag (T2F) is set to “1,” new data is
loaded from reload register R2, and count continues (auto-reload
function).
The timer 2 underflow signal divided by 2 can be output from the
CNTR0 pin by setting the bit 0 of register W5 to “1” and bit 3 of
register W2 to “1”.
Rev.1.02 May 25, 2007 Page 31 of 124
REJ03B0179-0102