4571 Datasheet, PDF (112/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4571 Group
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Detailed description
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− Transfers the high-order 4 bits of prescaler to register B.
Transfers the low-order 4 bits of prescaler to register A.
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− Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS.
Transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register RPS.
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− Transfers the high-order 4 bits (T17−T14) of timer 1 to register B.
Transfers the low-order 4 bits (T13−T10) of timer 1 to register A.
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− Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1L.
Transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1L.
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− Transfers the contents of register B to the high-order 4 bits (R17−R14) of reload register R1, and the contents
of register A to the low-order 4 bits (R13−R10) of reload register R1.
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− Transfers the high-order 4 bits (T27−T24) of timer 2 to register B.
Transfers the low-order 4 bits (T23−T20) of timer 2 to register A.
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− Transfers the contents of register B to the high-order 4 bits of timer 2 and timer 2 reload register R2L.
Transfers the contents of register A to the low-order 4 bits of timer 2 and timer 2 reload register R2L.
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− Transfers the high-order 4 bits (T37−T34) of timer 3 to register B.
Transfers the low-order 4 bits (T33−T30) of timer 3 to register A.
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− Transfers the contents of register B to the high-order 4 bits of timer 3 and timer 3 reload register R3L.
Transfers the contents of register A to the low-order 4 bits of timer 3 and timer 3 reload register R3L.
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− Transfers the contents of register B to the high-order 4 bits of timer 3 reload register R3H.
Transfers the contents of register A to the low-order 4 bits of timer 3 reload register R3H.
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− Transfers the contents of timer 3 reload register R3L to timer 3.
V12 = 0 : (T1F) = 1 − When V12 = 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag
T1F is “1”. When the T1F flag is “0”, executes the next instruction.
When V12 = 1 : This instruction is equivalent to the NOP instruction.
(V12: bit 2 of interrupt control register V1)
V13 = 0 : (T2F) = 1 − When V13 = 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag
T2F is “1”. When the T2F flag is “0”, executes the next instruction.
When V13 = 1 : This instruction is equivalent to the NOP instruction.
(V13: bit 3 of interrupt control register V1)
V20 = 0 : (T3F) = 1 − When V20 = 0 : Clears (0) to the T3F flag and skips the next instruction when timer 3 interrupt request flag
T3F is “1”. When the T3F flag is “0”, executes the next instruction.
When V20 = 1 : This instruction is equivalent to the NOP instruction.
(V20: bit 0 of interrupt control register V2)
Rev.1.02 May 25, 2007 Page 112 of 124
REJ03B0179-0102