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4571 Datasheet, PDF (4/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
4571 Group
PERFORMANCE OVERVIEW
Table 2 Performance overview
Parameter
Function
Number of basic instructions M34571G4/G6 126
M34571GD 128
Minimum instruction execution time
0.5 µs (Oscillation frequency 6 MHz: through mode)
Memory sizes
ROM
M34571G4 4096 words × 10 bits
M34571G6 6144 words × 10 bits
M34571GD 16384 words × 10 bits
RAM
128 words × 4 bits
I/O port
D0–D4
I/O (Input is
examined by
skip decision)
Five independent I/O ports;
The output structure of ports D0–D3 is switched by software.
Port D4 is also used as CNTR0, respectively.
P00−P03 I/O
4-bit I/O port; a pull-up function and a key-on wakeup function can be switched by software.
P10−P13 I/O
4-bit I/O port; a pull-up function and a key-on wakeup function can be switched by software.
P20, P21 I/O
2-bit I/O port; a pull-up function and a key-on wakeup function can be switched by software.
Ports P20 and P21 are also used as INT0 and INT1, respectively.
P30, P31 I/O
2-bit I/O port ; the output structure is switched by software.
C
Output
1-bit output port (CMOS output only); port C is also used as CNTR1 pin.
K
Input
1-bit input port ; a key-on wakeup function can be switched by software.
CNTR0 Timer I/O
1-bit I/O port ; CNTR0 pin is also used as port D4.
CNTR1 Timer output 1-bit output port ; CNTR1 pin is also used as port C.
INT0, INT1 Interrupt input 1-bit input port ; INT0 and INT1 are also used as ports P20 and P21, respectively.
Timer
Timer 1
8-bit timer with a reload register and carrier wave output auto-control function, and has
an event counter.
Timer 2
8-bit timer with a reload register.
Timer 3
8-bit timer with two reload registers and carrier wave generation function.
Watchdog timer
16-bit timer, fixed dividing frequency (timer for monitor)
Power-on reset circuit
Built-in
Voltage drop
detection circuit
Reset occurrence
Reset release
Typ. 1.65 V (Ta=25 °C)
Typ. 1.75 V (Ta=25 °C)
Interrupt occurrence
Typ. 1.85 V (Ta=25 °C)
Interrupt
Source
6 sources (two for external, three for timers, voltage drop detection circuit)
Nesting
1 level
Subroutine nesting
8 levels
Device structure
CMOS sillicon gate
Package
24-pin plastic molded SSOP (PRSP0024GA-A)
Operating temperature range
-20 to 85 °C
Power source voltage
1.8 to 5.5 V (It depends on oscillation frequency and operation mode)
Power At active mode
dissipation At RAM back-up
(Typ. value)
0.3 mA (Ta = 25 °C, VDD = 3.0 V, f(XIN)=4 MHz, f(STCK)=f(XIN)/8)
0.1 µA (Ta = 25 °C, output transistor is cut-off state)
Rev.1.02 May 25, 2007 Page 4 of 124
REJ03B0179-0102