4571 Datasheet, PDF (47/126 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4571 Group
Table 21 Key-on wakeup control registers
Key-on wakeup control register K0
K03
Port P03 key-on wakeup
control bit
K02
Port P02 key-on wakeup
control bit
K01
Port P01 key-on wakeup
control bit
K00
Port P00 key-on wakeup
control bit
at reset : 00002
at RAM back-up : state retained
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
Key-on wakeup control register K1
K13
Port P13 key-on wakeup
control bit
K12
Port P12 key-on wakeup
control bit
K11
Port P11 key-on wakeup
control bit
K10
Port P10 key-on wakeup
control bit
at reset : 00002
at RAM back-up : state retained
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
Key-on wakeup control register K2
K23 Not used
K22
Port K key-on wakeup
control bit
K21
Port P21 key-on wakeup
control bit
K20
Port P20 key-on wakeup
control bit
at reset : 00002
at RAM back-up : state retained
0
This bit has no function, but read/write is enabled.
1
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
0 Key-on wakeup not used
1 Key-on wakeup used
Key-on wakeup control register L1
at reset : 00002
at RAM back-up : state retained
L13
INT1 pin return condition selection
bit
0 Return by level
1 Return by edge
L12
INT1 pin valid waveform/
level selection bit
0 Key-on wakeup not used
1 Key-on wakeup used
L11
INT0 pin
return condition selection bit
0 Return by level
1 Return by edge
L10
INT0 pin
key-on wakeup control bit
0 Key-on wakeup not used
1 Key-on wakeup used
Note 1.“R” represents read enabled, and “W” represents write enabled.
R/W
TAK0/TK0A
R/W
TAK1/TK1A
R/W
TAK2/TK2A
R/W
TAL1/TL1A
Rev.1.02 May 25, 2007 Page 47 of 124
REJ03B0179-0102