PIC18F2331_10 Datasheet, PDF (95/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
9.0 8 x 8 HARDWARE MULTIPLIER
9.1 Introduction
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to be
completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms, and
allows the PIC18 devices to be used in many applications
previously reserved for digital signal processors.
A comparison of various hardware and software multi-
ply operations, along with the savings in memory and
execution time, is shown in Table 9-1.
9.2 Operation
Example 9-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 9-1:
MOVF ARG1, W
MULWF ARG2
8 x 8 UNSIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
EXAMPLE 9-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
MOVF ARG1, W
MULWF ARG2
BTFSC ARG2, SB
SUBWF PRODH, F
MOVF
BTFSC
SUBWF
ARG2, W
ARG1, SB
PRODH, F
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
- ARG1
; Test Sign Bit
; PRODH = PRODH
;
- ARG2
TABLE 9-1: PERFORMANCE COMPARISON
Routine
Multiply Method
Program
Memory
(Words)
8 x 8 Unsigned
Without Hardware Multiply
Hardware Multiply
13
1
8 x 8 Signed
Without Hardware Multiply
33
Hardware Multiply
6
16 x 16 Unsigned
Without Hardware Multiply
Hardware Multiply
21
24
16 x 16 Signed
Without Hardware Multiply
Hardware Multiply
52
36
Cycles
(Max)
69
1
91
6
242
24
254
36
Time
@ 40 MHz
6.9 s
100 ns
9.1 s
600 ns
24.2 s
2.4 s
25.4 s
3.6 s
@ 10 MHz
27.6 s
400 ns
36.4 s
2.4 s
96.8 s
9.6 s
102.6 s
14.4 s
@ 4 MHz
69 s
1 s
91 s
6 s
242 s
24 s
254 s
36 s
 2010 Microchip Technology Inc.
DS39616D-page 95