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PIC18F2331_10 Datasheet, PDF (299/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Clear f
[ label ] CLRF f [,a]
0 ï£ f ï£ 255
a ïï [0,1]
000h ï® f,
1ï®Z
Z
0110 101a ffff ffff
Clears the contents of the specified reg-
ister. If âaâ is â0â, the Access Bank will be
selected, overriding the BSR value. If
âaâ = 1, then the bank will be selected as
per the BSR value.
1
1
Q2
Read
register âfâ
Q3
Process
Data
Q4
Write
register âfâ
Example:
CLRF
Before Instruction
FLAG_REG =
After Instruction
FLAG_REG =
FLAG_REG
0x5A
0x00
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Clear Watchdog Timer
[ label ] CLRWDT
None
000h ï® WDT,
000h ï® WDT postscaler,
1 ï® TO,
1 ï® PD
TO, PD
0000 0000 0000 0100
CLRWDT instruction resets the
Watchdog Timer. It also resets the post-
scaler of the WDT. Status bits TO and
PD are set.
1
1
Q2
No
operation
Q3
Process
Data
Q4
No
operation
Example:
CLRWDT
Before Instruction
WDT Counter
=
After Instruction
WDT Counter
=
WDT Postscaler =
TO
=
PD
=
?
0x00
0
1
1
ï£ 2010 Microchip Technology Inc.
DS39616D-page 299
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