PIC18F2331_10 Datasheet, PDF (361/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 26-20: A/D CONVERTER CHARACTERISTICS
PIC18LF2331/2431/4331/4431
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C  TA  +85°C for industrial
PIC18F2331/2431/4331/4431
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C  TA  +85°C for industrial
-40°C  TA  +125°C for extended
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
Device Supply
AVDD Analog VDD Supply
VDD – 0.3
—
VDD + 0.3
V
AVSS Analog VSS Supply
VSS – 0.3
—
VSS + 0.3
V
IAD
Module Current
(during conversion)
—
500
—
250
—
A VDD = 5V
—
A VDD = 2.5V
IADO
Module Current Off
—
—
1.0
A
AC Timing Parameters
A10 FTHR Throughput Rate
—
—
200
ksps VDD = 5V, single channel
—
—
75
ksps VDD < 3V, single channel
A11 TAD
A/D Clock Period
385
—
20,000
ns VDD = 5V
1000
—
20,000
ns VDD = 3V
A12 TRC
A/D Internal RC Oscillator Period
—
500
1500
ns PIC18F parts
—
750
2250
ns PIC18LF parts
—
10000
20000
ns AVDD < 3.0V
A13 TCNV
Conversion Time⁽¹⁾
12
12
12
TAD
A14 TACQ
Acquisition Time⁽²⁾
2⁽²⁾
—
—
TAD
A16 TTC
Conversion Start from External
1/4 TCY
—
—
Reference Inputs
A20 VREF
Reference Voltage for 10-Bit
Resolution (VREF+ – VREF-)
1.5
—
AVDD – AVSS V VDD 3V
1.8
—
AVDD – AVSS V VDD < 3V
A21 VREFH Reference Voltage High (AVDD or VREF+) 1.5V
—
AVDD
V VDD 3V
A22 VREFL Reference Voltage Low (AVSS or VREF-)
AVSS
—
VREFH – 1.5V V
A23 IREF
Reference Current
—
150 A
—
—
75 A
—
VDD = 5V
VDD = 2.5V
Analog Input Characteristics
A26 VAIN
Input Voltage⁽³⁾
AVSS – 0.3
—
AVDD + 0.3 V
A30 ZAIN
Recommended Impedance of Analog
—
—
2.5
k
Voltage Source
A31 ZCHIN Analog Channel Input Impedance
—
—
10.0
k VDD = 3.0V
DC Performance
A41 NR
Resolution
10 bits
—
A42 EIL
Integral Nonlinearity
—
—
<1
LSb VDD  3.0V
VREFH  3.0V
A43 EIL
Differential Nonlinearity
—
—
<1
LSb VDD  3.0V
VREFH  3.0V
A45 EOFF Offset Error
—
0.5
<1.5
LSb VDD  3.0V
VREFH  3.0V
A46 EGA
Gain Error
—
0.5
<1.5
LSb VDD  3.0V
VREFH  3.0V
A47 —
Monotonicity⁽⁴⁾
guaranteed
— VDD  3.0V
VREFH  3.0V
Note 1:
2:
3:
4:
Conversion time does not include acquisition time. See Section 21.0 “10-Bit High-Speed Analog-to-Digital Converter
(A/D) Module” for a full discussion of acquisition time requirements.
In Sequential modes, TACQ should be 12 TAD or greater.
For VDD < 2.7V and temperature below 0°C, VAIN should be limited to range < VDD/2.
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
 2010 Microchip Technology Inc.
DS39616D-page 361