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PIC18F2331_10 Datasheet, PDF (359/392 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
PIC18F2331/2431/4331/4431
TABLE 26-17: SSP I2C™ BUS DATA REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
100 THIGH Clock High Time 100 kHz mode 2(TOSC)(BRG + 1) —
400 kHz mode 2(TOSC)(BRG + 1) —
101 TLOW Clock Low Time 100 kHz mode 2(TOSC)(BRG + 1) —
400 kHz mode 2(TOSC)(BRG + 1) —
102 TR
SDA and SCL
Rise Time
100 kHz mode
400 kHz mode
—
20 + 0.1 CB
1000
300
103 TF
SDA and SCL 100 kHz mode
—
300
Fall Time
400 kHz mode
20 + 0.1 CB
300
90 TSU:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) —
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
91 THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) —
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
106 THD:DAT Data Input
100 kHz mode
0
—
Hold Time
400 kHz mode
0
0.9
107 TSU:DAT Data Input
100 kHz mode
250
—
Setup Time
400 kHz mode
100
—
92 TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) —
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
109 TAA
Output Valid
from Clock
100 kHz mode
400 kHz mode
—
3500
—
1000
110 TBUF Bus Free Time 100 kHz mode
4.7
—
400 kHz mode
1.3
—
D102 CB
Bus Capacitive Loading
—
400
ms
ms
ms
ms
ns CB is specified to be from
ns 10 to 400 pF
ns CB is specified to be from
ns 10 to 400 pF
ms Only relevant for
ms Repeated Start
condition
ms After this period, the first
ms clock pulse is generated
ns
ms
ns
ns
ms
ms
ns
ns
ms Time the bus must be
ms free before a new
transmission can start
pF
 2010 Microchip Technology Inc.
DS39616D-page 359